From patchwork Wed Jun 6 13:07:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 137829 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp782149lji; Wed, 6 Jun 2018 06:08:59 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJGk7zDrdli/eIiObHxXidQpPlE2BHXpEMeNfaIA8dfRogNGNYZTfgW2wZ2wNM/pQPHuGAD X-Received: by 2002:a65:4a10:: with SMTP id s16-v6mr2579394pgq.57.1528290538893; Wed, 06 Jun 2018 06:08:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528290538; cv=none; d=google.com; s=arc-20160816; b=EI1rNquuShioKa0Et1OMhzNS1f062GAdMWSZlpmghWV/YnrNpd2mZLcqjX7EtTv/PA QNCqdMrhg/YkFG5jRixXwluo3my9MYnphVy5istFqHcvlBHeBTYLyDsyMHdyahhNSToQ 5wVZPUxH06fpXOC/0v7VOnlb3bnn2XK7bIWtV7cAU8PX2PPo/DHQkOV5FOa6f+MV5qsz H80vWw13b7um/jZ2+dWYBNWONmeWYDsFfXOffK/exEfTnp/z2rXu/TkrGmACh7FUb+kx P7j73EnWZv5/uVil5yk6SRqzf1Zlyfnt19zx/856f8lee41Lew/IeHlh+AUxZuXLPWXT xdhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=rUgOCcetzR3rd/qOhiYTAQuxdtuSsjBHeb1E7oyQUns=; b=vbx8TwyDIhomHA1CSXuxovAR3z1FSAc+XX3MAI4sKw2aSj75h7f4qdP1qtYbjcCuOn btW/L2HiBEJU506pwd5pnFY9byazh18bL3j/tKGlL59qte5LeTLZXCyroDeqSPjobqdi DyTHLWea37O7BdBA3RR4mBPGqXQjT4jPnToWGUHumhOCN6MU96GAyJ8QRL0BqA0mDOJ6 h6GeYi0mdK+o/FR744/FrZW+qOp+ECCnuZjiNcHM83lTeBfFZBKXhMTlXPiu48M2m7N4 xQTCITPlc3ZMmOF5lAt+I1c4CRkTs3vnCZ3WISnBYYO6QgBVkvYQaFKQIc5udZnmtg/u 0oCg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m8-v6si9933064pga.530.2018.06.06.06.08.58; Wed, 06 Jun 2018 06:08:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752228AbeFFNIy (ORCPT + 30 others); Wed, 6 Jun 2018 09:08:54 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:58573 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752046AbeFFNIv (ORCPT ); Wed, 6 Jun 2018 09:08:51 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 93112F584F97; Wed, 6 Jun 2018 21:08:48 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.227.234) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.382.0; Wed, 6 Jun 2018 21:08:39 +0800 From: Salil Mehta To: CC: , , , , , , , Xi Wang Subject: [PATCH V2 net-next 3/3] net: hns3: Optimize PF CMDQ interrupt switching process Date: Wed, 6 Jun 2018 14:07:53 +0100 Message-ID: <20180606130753.54428-4-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180606130753.54428-1-salil.mehta@huawei.com> References: <20180606130753.54428-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.234] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xi Wang When the PF frequently switches the CMDQ interrupt, if the CMDQ_SRC is not cleared before the hardware interrupt is generated, the new interrupt will not be reported. This patch optimizes this problem by clearing CMDQ_SRC and RESET_STS before enabling interrupt and syncing pending IRQ handlers after disabling interrupt. Fixes: 466b0c00391b ("net: hns3: Add support for misc interrupt") Signed-off-by: Xi Wang Signed-off-by: Peng Li Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 2a80134..d318d35 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -2557,6 +2557,15 @@ static void hclge_clear_event_cause(struct hclge_dev *hdev, u32 event_type, } } +static void hclge_clear_all_event_cause(struct hclge_dev *hdev) +{ + hclge_clear_event_cause(hdev, HCLGE_VECTOR0_EVENT_RST, + BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) | + BIT(HCLGE_VECTOR0_CORERESET_INT_B) | + BIT(HCLGE_VECTOR0_IMPRESET_INT_B)); + hclge_clear_event_cause(hdev, HCLGE_VECTOR0_EVENT_MBX, 0); +} + static void hclge_enable_vector(struct hclge_misc_vector *vector, bool enable) { writel(enable ? 1 : 0, vector->addr); @@ -5688,6 +5697,8 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) INIT_WORK(&hdev->rst_service_task, hclge_reset_service_task); INIT_WORK(&hdev->mbx_service_task, hclge_mailbox_service_task); + hclge_clear_all_event_cause(hdev); + /* Enable MISC vector(vector0) */ hclge_enable_vector(&hdev->misc_vector, true); @@ -5817,6 +5828,8 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) /* Disable MISC vector(vector0) */ hclge_enable_vector(&hdev->misc_vector, false); + synchronize_irq(hdev->misc_vector.vector_irq); + hclge_destroy_cmd_queue(&hdev->hw); hclge_misc_irq_uninit(hdev); hclge_pci_uninit(hdev);