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[209.132.180.67]) by mx.google.com with ESMTP id w4-v6si14056701ply.481.2018.07.31.20.41.08; Tue, 31 Jul 2018 20:41:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DuNvVWyY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733053AbeHAFYd (ORCPT + 31 others); Wed, 1 Aug 2018 01:24:33 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:33154 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727014AbeHAFYd (ORCPT ); Wed, 1 Aug 2018 01:24:33 -0400 Received: by mail-pl0-f66.google.com with SMTP id 6-v6so8096363plb.0 for ; Tue, 31 Jul 2018 20:41:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Yo+LDLCDhPR78yjrPZOfTq5WVkY5aMuwoeScTScvKuk=; b=DuNvVWyYM2I0jhIGBxbnDXq0A0Gs0fFCYGxCEIBYhvCUviBTGpLMTm1eS3Oz0O7V/u jX0nJxufmdwf47TrFdXfAG2wHawc5jQR3trlvbG1rfm54vObbjSliLL1iywVu6Bvt9oY azCm+5mlEBeH3GXjJy7jPvFFzmpDU1Uzo3zt4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Yo+LDLCDhPR78yjrPZOfTq5WVkY5aMuwoeScTScvKuk=; b=CCWnFVB1jDuffabkudxYJeumR/K0DD21xp8wG0mm/MYGDmlZFf5W0EnGIaPFeYoV/K bHYMIHsfnhTLd2sR7P4jDjiETYJH6HbIZKGHb/7jLU/nDm2LUXOlwLwlNYFNAJf3tgXq plyXdkH3XilRlEALsWDiVsgk4LE9UMuXxz1zj/PMPH6jm3pqywINdh+3I/ze1LXr9trS nGybhzUqsEa2IGwmiJUkkxxxXoiqFPW9Xlt8ldDFARlApM+YQmF4DbrIiT/StqXXVgK5 kKzHjwEoqPPubWWIIqa0TqQgZJjuPyyT7ha2nzBuxxf+czdskBfqV1dQZQVSyIFW/UqJ 78OQ== X-Gm-Message-State: AOUpUlGjVR+Xr0fOU2jDgG5IT2zqtAjM5RcjdpPkvDdpzJJAS4V31WML bZbpjC4k4IfKzgBbLheITqyZ X-Received: by 2002:a17:902:bf44:: with SMTP id u4-v6mr23196504pls.84.1533094865650; Tue, 31 Jul 2018 20:41:05 -0700 (PDT) Received: from localhost.localdomain ([2405:204:730e:f0ae:ac4e:9cdd:28a2:4bf9]) by smtp.gmail.com with ESMTPSA id d19-v6sm34879545pgi.50.2018.07.31.20.40.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Jul 2018 20:41:05 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org, lee.jones@linaro.org, arnd@arndb.de Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v2 07/10] arm64: dts: actions: Add RMU node for Actions Semi S700 SoC Date: Wed, 1 Aug 2018 09:09:12 +0530 Message-Id: <20180801033915.15880-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180801033915.15880-1-manivannan.sadhasivam@linaro.org> References: <20180801033915.15880-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Reset Controller Unit (RMU) node under the system-controller node for Actions Semi S700 SoC. Also add the bindings constant header to be used by clients. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s700.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index a57f54587164..8498579504c7 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -5,6 +5,7 @@ #include #include +#include / { compatible = "actions,s700"; @@ -169,6 +170,11 @@ clocks = <&hosc>, <&losc>; #clock-cells = <1>; }; + + rmu: reset-controller { + compatible = "actions,s700-rmu"; + #reset-cells = <1>; + }; }; sps: power-controller@e01b0100 {