[18/18] soc/tegra: default select TEGRA_TIMER for Tegra210

Message ID	20190223130707.16704-18-daniel.lezcano@linaro.org
State	Accepted
Commit	f40f4fc9506d6b2b786920059b320aac3a831574
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; From: Daniel Lezcano <daniel.lezcano@linaro.org> To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Joseph Lo <josephl@nvidia.com>, Thierry Reding <treding@nvidia.com>, Jon Hunter <jonathanh@nvidia.com>, Thierry Reding <thierry.reding@gmail.com>, Mikko Perttunen <mperttunen@nvidia.com>, linux-tegra@vger.kernel.org (open list:TEGRA ARCHITECTURE SUPPORT) Subject: [PATCH 18/18] soc/tegra: default select TEGRA_TIMER for Tegra210 Date: Sat, 23 Feb 2019 14:07:06 +0100 Message-Id: <20190223130707.16704-18-daniel.lezcano@linaro.org> In-Reply-To: <20190223130707.16704-1-daniel.lezcano@linaro.org> References: <b5d75b05-b78c-535c-2b35-9a1f5a3a853f@linaro.org> <20190223130707.16704-1-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk
Series	[01/18] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable \| expand [01/18] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable [02/18] clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability [04/18] clocksource/drivers/exynos_mct: Clear timer interrupt when shutdown [05/18] dt-bindings: timer: renesas, cmt: Document r8a774c0 CMT support [06/18] dt-bindings: timer: renesas: tmu: Document r8a774c0 bindings [07/18] clocksource/drivers/riscv: Add required checks during clock source init [08/18] clocksource/drivers/exynos_mct: Remove dead code [09/18] clocksource/drivers/exynos_mct: Fix error path in timer resources initialization [10/18] dt-bindings: timer: mediatek: update bindings for MT7629 SoC [11/18] clocksource/drivers/exynos_mct: Remove unused header includes [12/18] dt-bindings: timer: gpt: update binding doc [13/18] clocksource/drivers/tango-xtal: Rename the file for consistency [14/18] clocksource/drivers/timer-pxa: Rename the file for consistency [15/18] clocksource/drivers/timer-cs5535: Rename the file for consistency [17/18] clocksource/drivers/tegra: Add Tegra210 timer support [18/18] soc/tegra: default select TEGRA_TIMER for Tegra210

Message ID

20190223130707.16704-18-daniel.lezcano@linaro.org

State

Accepted

Commit

f40f4fc9506d6b2b786920059b320aac3a831574

Headers

Received-SPF: pass (google.com: best guess record for domain of
	linux-kernel-owner@vger.kernel.org designates 209.132.180.67
	as permitted sender) client-ip=209.132.180.67; 
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: linux-kernel@vger.kernel.org, Joseph Lo <josephl@nvidia.com>,
	Thierry Reding <treding@nvidia.com>, Jon Hunter <jonathanh@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	linux-tegra@vger.kernel.org (open list:TEGRA ARCHITECTURE SUPPORT)
Subject: [PATCH 18/18] soc/tegra: default select TEGRA_TIMER for Tegra210
Date: Sat, 23 Feb 2019 14:07:06 +0100
Message-Id: <20190223130707.16704-18-daniel.lezcano@linaro.org>
In-Reply-To: <20190223130707.16704-1-daniel.lezcano@linaro.org>
References: <b5d75b05-b78c-535c-2b35-9a1f5a3a853f@linaro.org>
	<20190223130707.16704-1-daniel.lezcano@linaro.org>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Series

[01/18] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable | expand

Commit Message

Daniel Lezcano Feb. 23, 2019, 1:07 p.m. UTC

From: Joseph Lo <josephl@nvidia.com>


The tegra timer is necessary for Tegra210 to support CPU idle power-down
state. So select it by default.

Signed-off-by: Joseph Lo <josephl@nvidia.com>

Acked-by: Thierry Reding <treding@nvidia.com>

Acked-by: Jon Hunter <jonathanh@nvidia.com>

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

---
 drivers/soc/tegra/Kconfig | 1 +
 1 file changed, 1 insertion(+)

-- 
2.17.1

diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig
index fe4481676da6..a0b03443d8c1 100644
--- a/drivers/soc/tegra/Kconfig
+++ b/drivers/soc/tegra/Kconfig
@@ -76,6 +76,7 @@  config ARCH_TEGRA_210_SOC
 	select PINCTRL_TEGRA210
 	select SOC_TEGRA_FLOWCTRL
 	select SOC_TEGRA_PMC
+	select TEGRA_TIMER
 	help
 	  Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
 	  the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53

[18/18] soc/tegra: default select TEGRA_TIMER for Tegra210

Commit Message

Patch