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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id g8sm5459034wro.77.2019.03.18.02.58.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 02:58:56 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH v2 3/8] arm64: dts: meson: g12a: add uart_ao_a pinctrl Date: Mon, 18 Mar 2019 10:58:46 +0100 Message-Id: <20190318095851.4062-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190318095851.4062-1-narmstrong@baylibre.com> References: <20190318095851.4062-1-narmstrong@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jerome Brunet Add the always on UART pinctrl setting to the g12a soc DT. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.20.1 Reviewed-by: Martin Blumenstingl diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index e050737a1b3e..7023c1c0f23c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -179,6 +179,24 @@ #gpio-cells = <2>; gpio-ranges = <&ao_pinctrl 0 0 15>; }; + + uart_ao_a_pins: uart-a-ao { + mux { + groups = "uart_ao_a_tx", + "uart_ao_a_rx"; + function = "uart_ao_a"; + bias-disable; + }; + }; + + uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts { + mux { + groups = "uart_ao_a_cts", + "uart_ao_a_rts"; + function = "uart_ao_a"; + bias-disable; + }; + }; }; };