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+Qualcomm IP Accelerator (IPA)
+
+This binding describes the Qualcomm IPA.  The IPA is capable of offloading
+certain network processing tasks (e.g. filtering, routing, and NAT) from
+the main processor.
+
+The IPA sits between multiple independent "execution environments,"
+including the Application Processor (AP) and the modem.  The IPA presents
+a Generic Software Interface (GSI) to each execution environment.
+The GSI is an integral part of the IPA, but it is logically isolated
+and has a distinct interrupt and a separately-defined address space.
+
+	--------	     ---------
+	|      |	     |	     |
+	|  AP  +<---.	.----+ Modem |
+	|      +--. |	| .->+	     |
+	|      |  | |	| |  |	     |
+	--------  | |	| |  ---------
+		  v |	v |
+		--+-+---+-+--
+		|    GSI    |
+		|-----------|
+		|	    |
+		|    IPA    |
+		|	    |
+		-------------
+
+See also:
+  bindings/interrupt-controller/interrupts.txt
+  bindings/interconnect/interconnect.txt
+  bindings/soc/qcom/qcom,smp2p.txt
+  bindings/reserved-memory/reserved-memory.txt
+  bindings/clock/clock-bindings.txt
+
+All properties except "modem-init" defined below are required.
+
+- compatible:
+	Must be "qcom,sdm845-ipa".
+
+- modem-init:
+	This Boolean property is optional.  If present, it indicates that
+	the modem is responsible for performing early IPA initialization,
+	including loading and validating firwmare used by the GSI.  This
+	early initialization is performed by Trust Zone otherwise.
+
+- reg:
+	Resources specifying the physical address spaces of the IPA and GSI.
+
+- reg-names:
+	The names of the two address space ranges defined by the "reg"
+	property.  Must be:
+		"ipa-reg"
+		"ipa-shared"
+		"gsi"
+
+- interrupts:
+	Specifies the IRQs used by the IPA.  Four interrupts are required,
+	specifying: the IPA IRQ; the GSI IRQ; the clock query interrupt
+	from the modem; and the "ready for setup" interrupt from the modem.
+	The first two are hardware IRQs; the third and fourth are SMP2P
+	input interrupts.
+
+- interrupt-names:
+	The names of the interrupts defined by the "interrupts-extended"
+	property.  Must be:
+		"ipa"
+		"gsi"
+		"ipa-clock-query"
+		"ipa-setup-ready"
+
+- clocks:
+	Resource that defines the IPA core clock.
+
+- clock-names:
+	The name used for the IPA core clock.  Must be "core".
+
+- interconnects:
+	Specifies the interconnects used by the IPA.  Three interconnects
+	are required, specifying:  the path from the IPA to memory; from
+	IPA to internal (SoC resident) memory; and between the AP subsystem
+	and IPA for register access.
+
+- interconnect-names:
+	The names of the interconnects defined by the "interconnects"
+	property.  Must be:
+		"memory"
+		"imem"
+		"config"
+
+- qcom,smem-states
+	The state bits used for SMP2P output.  Two states must be specified.
+	The first indicates whether the value in the second bit is valid
+	(1 means valid).  The second, if valid, defines whether the IPA
+	clock is enabled (1 means enabled).
+
+- qcom,smem-state-names
+	The names of the state bits used for SMP2P output.  Must be:
+		"ipa-clock-enabled-valid"
+		"ipa-clock-enabled"
+
+- memory-region
+	A phandle for a reserved memory area that holds the firmware passed
+	to Trust Zone for authentication.  (Note, this is required
+	only when Trust Zone performs early initialization; that is,
+	it is required if "modem-init" is not defined.)
+
+= EXAMPLE
+
+The following example represents the IPA present in the SDM845 SoC.  It
+shows portions of the "modem-smp2p" node to indicate its relationship
+with the interrupts and SMEM states used by the IPA.
+
+	smp2p-mpss {
+		compatible = "qcom,smp2p";
+		. . .
+		ipa_smp2p_out: ipa-ap-to-modem {
+			qcom,entry-name = "ipa";
+			#qcom,smem-state-cells = <1>;
+		};
+
+		ipa_smp2p_in: ipa-modem-to-ap {
+			qcom,entry-name = "ipa";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	ipa@1e40000 {
+		compatible = "qcom,sdm845-ipa";
+
+		modem-init;
+
+		reg = <0 0x1e40000 0 0x7000>,
+		      <0 0x1e47000 0 0x2000>,
+		      <0 0x1e04000 0 0x2c000>;
+		reg-names = "ipa-reg",
+			    "ipa-shared";
+			    "gsi";
+
+		interrupts-extended = <&intc 0 311 IRQ_TYPE_EDGE_RISING>,
+				      <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>,
+				      <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+				      <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
+		interrupt-names = "ipa",
+				   "gsi",
+				   "ipa-clock-query",
+				   "ipa-setup-ready";
+
+		clocks = <&rpmhcc RPMH_IPA_CLK>;
+		clock-names = "core";
+
+		interconnects =
+			<&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_EBI1>,
+			<&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_IMEM>,
+			<&rsc_hlos MASTER_APPSS_PROC &rsc_hlos SLAVE_IPA_CFG>;
+		interconnect-names = "memory",
+				     "imem",
+				     "config";
+
+		qcom,smem-states = <&ipa_smp2p_out 0>,
+				   <&ipa_smp2p_out 1>;
+		qcom,smem-state-names = "ipa-clock-enabled-valid",
+					"ipa-clock-enabled";
+	};
