From patchwork Tue Aug 6 17:02:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 170678 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp5959809ile; Tue, 6 Aug 2019 10:02:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqznH5Boj+LQsVMxAWtF9+Ss6qyksu8HXpwnTRWqArWy7YOdlI3u07VSAv3YwEanBqLC7/vY X-Received: by 2002:a62:2784:: with SMTP id n126mr4770475pfn.61.1565110948707; Tue, 06 Aug 2019 10:02:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565110948; cv=none; d=google.com; s=arc-20160816; b=t5xeU/+8lFk60oydS2Bm8USXZ1rjw+v1zeSAw/hIwTiahS9yDhwSTSLODkHk4+EUEL mSA4TeZHYnMTgOMFkIxs0P6JfXA6unHTfZ37QYu9SkLbHSyGYaItSR7Ep1K65mu5wTsR 1zF4tiIjqmu86mJmKq7HXrJEeoQtZ3xjjHnu35SILsypbcyJ8Dc7YOT8+bPWKvTOzxxb 6d0QZJUdiqBzInguoi3YFqWNcIqjMPInc/HelVW72mjMUwmuTVWQrWERQH7jvAPdTQeo +/rt6TCYb2qkK1KUQCzLJNwb7QQt5uvMBN5AUtmIqacvBvlbC0bg6QyEk9ctp8uBJfid rwTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=l78OJ+7DDsI9QoB94r3/xzNaSJgz0XkRVCuhhu54s9E=; b=xZHMNYoNvC6Uhf4zu5H19PO9yw28sD69HtzYeZc0+8y0dDeCZwNjAoGCZ/X3wwQ5td 5J1ExYH5E3W50a3ddO0smOvPnH+v1AICO2VpGOd1UWSztP2uVgLF2FIA/3rBIcJmBvtn gxvMpMxyzsMdunIJfx7uN7EA/T5qR7kHg09aQyi3kOpKdpUfzhCBg8l0RjwgUsNUeb1/ Fx7H3xlqconEIyMPDMyX+stD4Sghg0iSY1BB0l48WaOc7BQyt0ZPcjRMQZ357f8Bn24O 6Su70Oem+fjGv3Q6AjwmA0oZJ6jMFugw6ZEQpO+hOZdqkEm/kGFxkh5+aOy72Cx78uLz UJOQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k15si54909421pgj.216.2019.08.06.10.02.28; Tue, 06 Aug 2019 10:02:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387988AbfHFRC1 (ORCPT + 29 others); Tue, 6 Aug 2019 13:02:27 -0400 Received: from foss.arm.com ([217.140.110.172]:37046 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387964AbfHFRCY (ORCPT ); Tue, 6 Aug 2019 13:02:24 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AF9601570; Tue, 6 Aug 2019 10:02:23 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5BA3B3F575; Tue, 6 Aug 2019 10:02:21 -0700 (PDT) From: Sudeep Holla To: linux-arm-kernel@lists.infradead.org Cc: Sudeep Holla , Peng Fan , linux-kernel@vger.kernel.org, Bo Zhang , Jim Quinlan , Volodymyr Babchuk , Gaku Inami , aidapala@qti.qualcomm.com, pajay@qti.qualcomm.com, Etienne Carriere , Souvik Chakravarty , wesleys@xilinx.com, Felix Burton , Saeed Nowshadi , Philipp Zabel , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 3/5] dt-bindings: arm: Extend SCMI to support new reset protocol Date: Tue, 6 Aug 2019 18:02:06 +0100 Message-Id: <20190806170208.6787-4-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190806170208.6787-1-sudeep.holla@arm.com> References: <20190806170208.6787-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SCMIv2.0 adds a new Reset Management Protocol to manage various reset states a given device or domain can enter. Extend the existing SCMI bindings to add reset protocol support by re-using the reset bindings for bothe reset providers and consumers. Cc: Philipp Zabel Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/arm,scmi.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt index 317a2fc3667a..083dbf96ee00 100644 --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt @@ -73,6 +73,16 @@ SCMI provides an API to access the various sensors on the SoC. as used by the firmware. Refer to platform details for your implementation for the IDs to use. +Reset signal bindings for the reset domains based on SCMI Message Protocol +------------------------------------------------------------ + +This binding for the SCMI reset domain providers uses the generic reset +signal binding[5]. + +Required properties: + - #reset-cells : Should be 1. Contains the reset domain ID value used + by SCMI commands. + SRAM and Shared Memory for SCMI ------------------------------- @@ -93,6 +103,7 @@ Each sub-node represents the reserved area for SCMI. [2] Documentation/devicetree/bindings/power/power_domain.txt [3] Documentation/devicetree/bindings/thermal/thermal.txt [4] Documentation/devicetree/bindings/sram/sram.txt +[5] Documentation/devicetree/bindings/reset/reset.txt Example: @@ -152,6 +163,11 @@ firmware { reg = <0x15>; #thermal-sensor-cells = <1>; }; + + scmi_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; }; }; @@ -166,6 +182,7 @@ hdlcd@7ff60000 { reg = <0 0x7ff60000 0 0x1000>; clocks = <&scmi_clk 4>; power-domains = <&scmi_devpd 1>; + resets = <&scmi_reset 10>; }; thermal-zones {