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[209.132.180.67]) by mx.google.com with ESMTP id gv21si10922488ejb.289.2019.09.11.04.47.03; Wed, 11 Sep 2019 04:47:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Q1jZcqmW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727823AbfIKLrA (ORCPT + 27 others); Wed, 11 Sep 2019 07:47:00 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:37553 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726657AbfIKLq6 (ORCPT ); Wed, 11 Sep 2019 07:46:58 -0400 Received: by mail-wm1-f65.google.com with SMTP id r195so3165012wme.2; Wed, 11 Sep 2019 04:46:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XLyQ3Vlb+rG+95957y6BztxIW1tdl5LgP7WaxmxVaO0=; b=Q1jZcqmWsHMzgEghiccCanRSPHWlytaT/p73rkABDBpEVrVIdPyhVBsQRa83y7yMwk 8vVGvx30GcYDujSlS3VxDH5ZmkqUbcKICCbkOmPADFguytXS59u9yHhwAmSl5fDbd5YY X2li4ZcxeJjFi6+DJyrRPSgpSsMU6SySDL60WMIS2gWFtEQie2Vnug5trHsGrDV8qLF0 ihFNv9p5QnRps0Xm7D//Dig9Y6f1hok8zIrdddu9wOkudYYpIYdHUh3+fyEJ465lg6Dw wB7tnkq37MYs03eZ/B6bTZslAceoKcWexuBT6RYVxRTcq3GAL2lZ4E8CWlwiiMHhwBp2 Iruw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XLyQ3Vlb+rG+95957y6BztxIW1tdl5LgP7WaxmxVaO0=; b=VnAop/hBEewJpXGs5+PMwBPpSRqXpcgZoNj8g9bsmw77TOOiZVFepLH+8t9Vai7iR0 oqej2wY29ebvuEG+5OxQeekWQkBMhxGdnSrxLcNkSFPwLZUvMpdQt9yURCtghlAiWM9v gHMVKhQGktAGPTF4fgxw8zBaMc0hBEM11jiTDXiUs38GgwtKcLZo9NvAyTPmveYiUgGp McuH6K4PuA3W1FhExLuVkzq/W5Gh88YBnG+1dFoJkdAu1HjKZVEHqIX+iK6PkODAg+e0 IDBHlBsqYqz1mMcDTwvYH2Bc3fF7xCMl7yn5Jr+lh5406LCyJOrIhM8BjSClTGtHcrXq eLkw== X-Gm-Message-State: APjAAAW6+FT7nunW7xA6QkCgqdM93iHWMGYPGsktd0sCYckRZNIBulrz RftsyXTyAH5YWT15GpXcc18= X-Received: by 2002:a1c:f518:: with SMTP id t24mr3443917wmh.98.1568202416288; Wed, 11 Sep 2019 04:46:56 -0700 (PDT) Received: from Red.localdomain ([2a01:cb1d:147:7200:2e56:dcff:fed2:c6d6]) by smtp.googlemail.com with ESMTPSA id h17sm4864705wme.6.2019.09.11.04.46.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Sep 2019 04:46:55 -0700 (PDT) From: Corentin Labbe To: davem@davemloft.net, herbert@gondor.apana.org.au, mripard@kernel.org, wens@csie.org Cc: linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Corentin Labbe Subject: [PATCH 2/2] crypto: sun4i-ss: enable pm_runtime Date: Wed, 11 Sep 2019 13:46:50 +0200 Message-Id: <20190911114650.20567-3-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190911114650.20567-1-clabbe.montjoie@gmail.com> References: <20190911114650.20567-1-clabbe.montjoie@gmail.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch enables power management on the Security System. Signed-off-by: Corentin Labbe --- drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 5 +++ drivers/crypto/sunxi-ss/sun4i-ss-core.c | 42 ++++++++++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c index fa4b1b47822e..1fedec9e83b0 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c @@ -10,6 +10,8 @@ * * You could find the datasheet in Documentation/arm/sunxi.rst */ + +#include #include "sun4i-ss.h" static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq) @@ -497,13 +499,16 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) return PTR_ERR(op->fallback_tfm); } + pm_runtime_get_sync(op->ss->dev); return 0; } void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) { struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); + crypto_free_sync_skcipher(op->fallback_tfm); + pm_runtime_put_sync(op->ss->dev); } /* check and set the AES key, prepare the mode to be used */ diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index 2c9ff01dddfc..5e6e1a308f60 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -258,6 +259,37 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) return err; } +#ifdef CONFIG_PM +static int sun4i_ss_pm_suspend(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + sun4i_ss_disable(ss); + return 0; +} + +static int sun4i_ss_pm_resume(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + return sun4i_ss_enable(ss); +} +#endif + +const struct dev_pm_ops sun4i_ss_pm_ops = { + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) +}; + +static void sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) +{ + pm_runtime_use_autosuspend(ss->dev); + pm_runtime_set_autosuspend_delay(ss->dev, 1000); + + pm_runtime_get_noresume(ss->dev); + pm_runtime_set_active(ss->dev); + pm_runtime_enable(ss->dev); +} + static int sun4i_ss_probe(struct platform_device *pdev) { u32 v; @@ -357,9 +389,12 @@ static int sun4i_ss_probe(struct platform_device *pdev) writel(0, ss->base + SS_CTL); ss->dev = &pdev->dev; + platform_set_drvdata(pdev, ss); spin_lock_init(&ss->slock); + sun4i_ss_pm_init(ss); + for (i = 0; i < ARRAY_SIZE(ss_algs); i++) { ss_algs[i].ss = ss; switch (ss_algs[i].type) { @@ -388,7 +423,8 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } - platform_set_drvdata(pdev, ss); + + pm_runtime_put_sync(ss->dev); return 0; error_alg: i--; @@ -405,6 +441,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } + pm_runtime_disable(ss->dev); error_enable: sun4i_ss_disable(ss); return err; @@ -429,6 +466,8 @@ static int sun4i_ss_remove(struct platform_device *pdev) } } + pm_runtime_disable(ss->dev); + writel(0, ss->base + SS_CTL); sun4i_ss_disable(ss); return 0; @@ -445,6 +484,7 @@ static struct platform_driver sun4i_ss_driver = { .remove = sun4i_ss_remove, .driver = { .name = "sun4i-ss", + .pm = &sun4i_ss_pm_ops, .of_match_table = a20ss_crypto_of_match_table, }, };