From patchwork Mon Mar 13 12:03:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 95209 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp1138340qgd; Mon, 13 Mar 2017 05:03:57 -0700 (PDT) X-Received: by 10.98.76.140 with SMTP id e12mr37425546pfj.82.1489406637001; Mon, 13 Mar 2017 05:03:57 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k80si11271493pfk.272.2017.03.13.05.03.56; Mon, 13 Mar 2017 05:03:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752367AbdCMMDz (ORCPT + 25 others); Mon, 13 Mar 2017 08:03:55 -0400 Received: from szxga02-in.huawei.com ([45.249.212.188]:3868 "EHLO dggrg02-dlp.huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751058AbdCMMDs (ORCPT ); Mon, 13 Mar 2017 08:03:48 -0400 Received: from 172.30.72.54 (EHLO DGGEML402-HUB.china.huawei.com) ([172.30.72.54]) by dggrg02-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AJW13417; Mon, 13 Mar 2017 20:03:26 +0800 (CST) Received: from [127.0.0.1] (10.177.23.32) by DGGEML402-HUB.china.huawei.com (10.3.17.38) with Microsoft SMTP Server id 14.3.301.0; Mon, 13 Mar 2017 20:03:19 +0800 To: Catalin Marinas , Will Deacon , , "linux-kernel@vger.kernel.org" From: Ding Tianhong Subject: [PATCH] arm64: enable ARCH_WANT_RELAX_ORDER for aarch64 CC: Message-ID: <35233df0-3406-e66f-d9d2-bf7ed7814386@huawei.com> Date: Mon, 13 Mar 2017 20:03:08 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090202.58C68A92.0043, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: c3a5ccf4abca2d07ec1e64f45e789bf5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ARCH_WANT_RELAX_ORDER will enable Relaxed Ordering (RO) which allows transactions that do not have any order of completion requirements to complete more efficiently compare to the Stricted Ordering (SO) for ixbge nic card. The system will see high write-to-memory performance when RO is enabled on the data transactions just like the SPARC did. The aarch64 pcie controller could both support Relaxed Ordering (RO) and Stricted Ordering (SO), so enable ARCH_WANT_RELAX_ORDER for ixgbe nic card to get much more better performance, and didn't see any adverse effects. Nic Card(Ixgbe) Disable RO | Enable RO Performance(Per thread) 8.4Gb/s | 9.4Gb/s Tested by Iperf on Hip06/Hip07 Soc Board. Signed-off-by: Ding Tianhong --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) -- 1.9.0 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 8c7c244..36249a3 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -115,6 +115,7 @@ config ARM64 select SPARSE_IRQ select SYSCTL_EXCEPTION_TRACE select THREAD_INFO_IN_TASK + select ARCH_WANT_RELAX_ORDER help ARM 64-bit (AArch64) Linux support.