From patchwork Thu Nov 5 01:41:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 56011 Delivered-To: patch@linaro.org Received: by 10.112.61.134 with SMTP id p6csp126779lbr; Wed, 4 Nov 2015 17:42:19 -0800 (PST) X-Received: by 10.68.143.40 with SMTP id sb8mr6045849pbb.107.1446687739524; Wed, 04 Nov 2015 17:42:19 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u11si4092103pbs.57.2015.11.04.17.42.19; Wed, 04 Nov 2015 17:42:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro_org.20150623.gappssmtp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031561AbbKEBmR (ORCPT + 28 others); Wed, 4 Nov 2015 20:42:17 -0500 Received: from mail-pa0-f47.google.com ([209.85.220.47]:35689 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932839AbbKEBmN (ORCPT ); Wed, 4 Nov 2015 20:42:13 -0500 Received: by pasz6 with SMTP id z6so72385649pas.2 for ; Wed, 04 Nov 2015 17:42:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=bvrkdgRJN7K+cd8hUVC5kmQpMEUXJ4XEZR6soR7XWHA=; b=xRci6jd+KImEfmLsLxBAk08b/ERD8Cv889+HG9tqsOkUHztjISDScUSOig4J1GIRG9 1cF4UEMG1b4tIHi4O2w3bkSWB3N0AP4JCDjx4byNOpBlmPMXva1Is46LGqIol5L6J4y4 77Jssowv1b/wa9hS8PmVtA6YZ8jyHsZSQ1u3Fs00y9wxD1nFJ4fU4Xb4O8E7WduYqU24 rAQzhMfHQqSJr+lqa14/e9IfNOgky6j2ViDWpso4Z6EQXFWJQDvyAb3LYYv02SOSb9jf aXNkYDOOcKWVDfrXQfDZuwSl5kl5zwN+sm63J90Jbt2yJAguxMfed0Nu8oPADW3Doiol zLGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=bvrkdgRJN7K+cd8hUVC5kmQpMEUXJ4XEZR6soR7XWHA=; b=VUQFQlEybVnn/YqVE3GQ6biNtZPjH0vwD29KkL4tJcdqoEAiopJ2yPC7jbyrGlYS88 3pAQHjCQ1u/+eLiadzjKl/psMf1pOSOUgmvMQV9ieWqya4m+fFXlqpIFzJaHHkeNwCbl /uRXES+WvMRgrMyUteGM6D5E+geP16BdzdUEwGFpwEfKx57r16K4vEjv5p8iEiCm/LCg coC2hAuAlNi43E8TCgkU4HzOpM0o14NK1w9kilbnqhX5c1TcRFhIxJsXtsweR9lBp3BI UelUshyLs5JtYN6naANsh3xaNOeU0Bpy2DJdbBc5dzeCRDZGYpNObZ8frKOEe6eLa4wZ Hqug== X-Gm-Message-State: ALoCoQngKNVbTOOOA3AxpecVFQlY7vSxHxiC8ZssdIoY5bkaZc9oKgRLVxuo83yJ8qEt7XCSv+HL X-Received: by 10.68.233.233 with SMTP id tz9mr5993246pbc.15.1446687732288; Wed, 04 Nov 2015 17:42:12 -0800 (PST) Received: from localhost ([122.172.111.169]) by smtp.gmail.com with ESMTPSA id yk5sm4447314pac.5.2015.11.04.17.42.11 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 04 Nov 2015 17:42:11 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki , robh+dt@kernel.org, sboyd@codeaurora.org, lee.jones@linaro.org Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, mark.rutland@arm.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, nm@ti.com, devicetree@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Viresh Kumar , linux-kernel@vger.kernel.org (open list), "Rafael J. Wysocki" Subject: [PATCH V2 1/5] PM / OPP: Add "opp-supported-hw" binding Date: Thu, 5 Nov 2015 07:11:52 +0530 Message-Id: <4e574912e52fb87fc17f4d19d965ae05c888bd29.1446687367.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.6.2.198.g614a2ac In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We may want to enable only a subset of OPPs, from the bigger list of OPPs, based on what version of the hardware we are running on. This would enable us to not duplicate OPP tables for every version of the hardware we support. To enable that, this patch defines a new property 'opp-supported-hw'. It can support any number of hierarchy levels of the versions the hardware follows. And based on the selected hardware versions, we can pick only the relevant OPPs at runtime. Reviewed-by: Stephen Boyd Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/opp/opp.txt | 65 +++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) -- 2.6.2.198.g614a2ac -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt index 0cb44dc21f97..d072fa0ffbd4 100644 --- a/Documentation/devicetree/bindings/opp/opp.txt +++ b/Documentation/devicetree/bindings/opp/opp.txt @@ -123,6 +123,26 @@ properties. - opp-suspend: Marks the OPP to be used during device suspend. Only one OPP in the table should have this. +- opp-supported-hw: This enables us to select only a subset of OPPs from the + larger OPP table, based on what version of the hardware we are running on. We + still can't have multiple nodes with the same opp-hz value in OPP table. + + It's an user defined array containing a hierarchy of hardware version numbers, + supported by the OPP. For example: a platform with hierarchy of three levels + of versions (A, B and C), this field should be like , where X + corresponds to Version hierarchy A, Y corresponds to version hierarchy B and Z + corresponds to version hierarchy C. + + Each level of hierarchy is represented by a 32 bit value, and so there can be + only 32 different supported version per hierarchy. i.e. 1 bit per version. A + value of 0xFFFFFFFF will enable the OPP for all versions for that hierarchy + level. And a value of 0x00000000 will disable the OPP completely, and so we + never want that to happen. + + If 32 values aren't sufficient for a version hierarchy, than that version + hierarchy can be contained in multiple 32 bit values. i.e. in the + above example, Z1 & Z2 refer to the version hierarchy Z. + - status: Marks the node enabled/disabled. Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together. @@ -463,3 +483,48 @@ Example 5: Multiple OPP tables }; }; }; + +Example 6: opp-supported-hw +(example: three level hierarchy of versions: cuts, substrate and process) + +/ { + cpus { + cpu@0 { + compatible = "arm,cortex-a7"; + ... + + cpu-supply = <&cpu_supply> + operating-points-v2 = <&cpu0_opp_table_slow>; + }; + }; + + opp_table { + compatible = "operating-points-v2"; + status = "okay"; + opp-shared; + + opp00 { + /* + * Supports all substrate and process versions for 0xF + * cuts, i.e. only first four cuts. + */ + opp-supported-hw = <0xF 0xFFFFFFFF 0xFFFFFFFF> + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000 915000 925000>; + ... + }; + + opp01 { + /* + * Supports: + * - cuts: only one, 6th cut (represented by 6th bit). + * - substrate: supports 16 different substrate versions + * - process: supports 9 different process versions + */ + opp-supported-hw = <0x20 0xff0000ff 0x0000f4f0> + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <900000 915000 925000>; + ... + }; + }; +};