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[209.132.180.67]) by mx.google.com with ESMTP id s2si5062470plk.929.2017.08.07.02.11.24; Mon, 07 Aug 2017 02:11:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.b=tpkXQ0id; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752761AbdHGJLW (ORCPT + 25 others); Mon, 7 Aug 2017 05:11:22 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:25803 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752299AbdHGJLU (ORCPT ); Mon, 7 Aug 2017 05:11:20 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v779BA28027222; Mon, 7 Aug 2017 04:11:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1502097070; bh=ustNVdnGX8iljK0eS3KP8Y/LUu1+eCQ1gqhG+YECWJE=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=tpkXQ0ide876m8O2KY1AfVuGnk/UDguITAZE8AaVOwGq01+s1ZdNMtK56bs10spES kSLiF/cvTTlB7++3gea74kiJI/D0IYjly3Fgyt8ah5EcHr/W8VJdwv1sJxp1Aogtac nlRS1V5yoYCJ2fczl9eqr8Zfw1YYdpOlJqvVc/CA= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v779B5rY026291; Mon, 7 Aug 2017 04:11:05 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Mon, 7 Aug 2017 04:11:04 -0500 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v779B3pZ002435; Mon, 7 Aug 2017 04:11:03 -0500 Subject: [PATCH v2] phy: ti-pipe3: Use TRM recommended settings for SATA DPLL To: CC: , , , linux-omap References: <1495440630-21332-1-git-send-email-rogerq@ti.com> From: Roger Quadros Message-ID: Date: Mon, 7 Aug 2017 12:11:02 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <1495440630-21332-1-git-send-email-rogerq@ti.com> Content-Language: en-GB Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AM572x Technical Reference Manual, SPRUHZ6H, Revised November 2016 [1], shows recommended settings for the SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings. Use those settings in the driver. The TRM does not show a value for 20MHz SYS_CLK so we use something close to the 26MHz setting. [1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf Signed-off-by: Roger Quadros [nsekhar@ti.com: add exact TRM version to commit text] Signed-off-by: Sekhar Nori --- v2: - Mention full TRM version in commit log drivers/phy/ti/phy-ti-pipe3.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/phy/ti/phy-ti-pipe3.c b/drivers/phy/ti/phy-ti-pipe3.c index 9c84d32..0e564f3 100644 --- a/drivers/phy/ti/phy-ti-pipe3.c +++ b/drivers/phy/ti/phy-ti-pipe3.c @@ -118,12 +118,12 @@ static struct pipe3_dpll_map dpll_map_usb[] = { }; static struct pipe3_dpll_map dpll_map_sata[] = { - {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */ - {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */ + {12000000, {625, 4, 4, 6, 0} }, /* 12 MHz */ + {16800000, {625, 6, 4, 7, 0} }, /* 16.8 MHz */ {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */ - {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */ - {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */ - {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */ + {20000000, {750, 9, 4, 6, 0} }, /* 20 MHz */ + {26000000, {750, 12, 4, 6, 0} }, /* 26 MHz */ + {38400000, {625, 15, 4, 6, 0} }, /* 38.4 MHz */ { }, /* Terminator */ };