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[209.132.180.67]) by mx.google.com with ESMTP id 88-v6si1115831ple.298.2018.02.28.02.48.12; Wed, 28 Feb 2018 02:48:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LzITA8Kd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932143AbeB1KsH (ORCPT + 28 others); Wed, 28 Feb 2018 05:48:07 -0500 Received: from mail-pg0-f65.google.com ([74.125.83.65]:38228 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932127AbeB1KsE (ORCPT ); Wed, 28 Feb 2018 05:48:04 -0500 Received: by mail-pg0-f65.google.com with SMTP id l24so793818pgc.5 for ; Wed, 28 Feb 2018 02:48:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=Y4y2pmVGznn6N4anB2AEPr5FdyE8pJhkYo5+rr/RPIo=; b=LzITA8KdXfsieV+WOJofTavbkUYReuZ9DByYtrBl6imafwkbGRDGM0fK2V7pbyPVIj Fk8Gzkulp5mtm71+ik7bKfgCzEPz0uhmCv433LBdGIF+YCaXnC4aN21V48gBZSX032BW ea8bsWYGkLBdV80OqRxxdiCQif6F+M7SKrfkc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=Y4y2pmVGznn6N4anB2AEPr5FdyE8pJhkYo5+rr/RPIo=; b=QH9/k1OOYrzKspk/Pyo6PtVw2aR3KqZ4uX2Pc9nWBjsID7JCcQjUwYgVaMV+TQrQcv oOoUj8ieVF2HnqkJyU9gF+J5jAFMRKA1uC4bJJAD3D1zJIE5W9NEuy54DmmhQR24ZrRq zRklIUWrCO4fdFYPmziVkSi42w6QINDyH39ZtgrFKqO/SskzcT0Ff7yi+ylm0JGfs7D+ ovH/K7RuIut6kLSBh7lELRIAsWwhZjabaBWNG7tZNmBQZnoGVQ/SroFUa+mIj+jlLiLj 3B8KTX2soU3ZSp9Vm287EMEYvXifR1D+OxHcBKJBS6VO1BBJP7xNuHA4IE4t9sM44ksi OyGg== X-Gm-Message-State: APf1xPDBUCiAoKeTQL+M6Lze1lTUug6ADT5QViMWCtiYSKCf9/pQZDl6 FoDo9JNVTKUqh3T4l2VSRfNdkA== X-Received: by 10.98.141.205 with SMTP id p74mr12534115pfk.211.1519814883755; Wed, 28 Feb 2018 02:48:03 -0800 (PST) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id v14sm3636129pfi.8.2018.02.28.02.48.00 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 28 Feb 2018 02:48:03 -0800 (PST) From: Baolin Wang To: robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, arnd@arndb.de Cc: chunyan.zhang@linaro.org, orson.zhai@spreadtrum.com, mathieu.poirier@linaro.org, devicetree@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, broonie@kernel.org, baolin.wang@linaro.org Subject: [RESEND PATCH 4/7] arm64: dts: Add timer node for Spreadtrum SC9860 Date: Wed, 28 Feb 2018 18:47:07 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <5ec790b43c6fea9f36e06b5b20233b2adebd7d50.1519814593.git.baolin.wang@linaro.org> References: <5ec790b43c6fea9f36e06b5b20233b2adebd7d50.1519814593.git.baolin.wang@linaro.org> In-Reply-To: <5ec790b43c6fea9f36e06b5b20233b2adebd7d50.1519814593.git.baolin.wang@linaro.org> References: <5ec790b43c6fea9f36e06b5b20233b2adebd7d50.1519814593.git.baolin.wang@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will use one always-on timer to be the broadcast device, thus add the timer device node for Spreadtrum SC9860 platform. Signed-off-by: Baolin Wang --- arch/arm64/boot/dts/sprd/whale2.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) -- 1.7.9.5 diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index 23cedbd..3dc6389 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -122,6 +122,13 @@ #size-cells = <0>; }; + timer@40050000 { + compatible = "sprd,sc9860-timer"; + reg = <0 0x40050000 0 0x20>; + interrupts = ; + clocks = <&ext_32k>; + }; + hwlock: hwspinlock@40500000 { compatible = "sprd,hwspinlock-r3p0"; reg = <0 0x40500000 0 0x1000>;