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[209.132.180.67]) by mx.google.com with ESMTP id j6si8653501pfh.329.2017.10.29.06.49.43; Sun, 29 Oct 2017 06:49:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NMGZY8kl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751877AbdJ2Ntl (ORCPT + 27 others); Sun, 29 Oct 2017 09:49:41 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:46121 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751830AbdJ2Nth (ORCPT ); Sun, 29 Oct 2017 09:49:37 -0400 Received: by mail-pf0-f196.google.com with SMTP id p87so8667731pfj.3 for ; Sun, 29 Oct 2017 06:49:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=/PAFDc19whP8gE8TbCtljqrLmylPN1rotB4sfti0awU=; b=NMGZY8kl2QgEMGTSBJ4E/4vCWzQ/d8U5z01eLL1yGm49SJ4IcYr+Cav5pVS32T/8Yr 0DoIX1D7XEUEnSnTlUyf87DNbfgA43CiS2DWz7ydplNBMhvNgycocWlwSG1HMMAq0Uom VSfDzO3g/SyZO9C2mQvoQORY2gi1+e5rBXa9A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=/PAFDc19whP8gE8TbCtljqrLmylPN1rotB4sfti0awU=; b=In36jYZHrE6nVnhqx/P7j+vSCCmjK2Mgj/k2dJRinGklkz8KENEPLGimLjTr0Ury/G 6/NoO/SQ8StHbfLuve5h5gv4sbttZ+gQKJ9Q+aZIB0MpWq/BhIe44QiBDa8DoICrTyqe shsUvUiivSTjxLxfTHq4xTx6tBnzGdkL5msx4xZqJbOlQg9JgqyBXOkFcNJfXY3ERlRb e1KpieYuyRelXIlpFBprTrkZfzV3Y6GhNJi2CQxbN9ZcBiXgJN6+K60Mey1lV3OK0WT0 dXDuA4fBUxaK27iGPt6qblBx8sjgk2UOkbbYIhIzqkx+p5PuLKYe+d60gadmLFoq272O 9KyA== X-Gm-Message-State: AMCzsaWfeSm4O3gOCftUXCHEcUX+0klaLS1yoNsGt3XIo1/VhtpSkDJN rWotiHn/+pQ3VMRjZW6dEnoL1Q== X-Received: by 10.99.3.7 with SMTP id 7mr5161897pgd.295.1509284976800; Sun, 29 Oct 2017 06:49:36 -0700 (PDT) Received: from localhost ([122.167.161.211]) by smtp.gmail.com with ESMTPSA id l22sm24563957pfk.45.2017.10.29.06.49.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 29 Oct 2017 06:49:36 -0700 (PDT) From: Viresh Kumar To: Greg Kroah-Hartman Cc: Viresh Kumar , Vincent Guittot , Stephen Boyd , Rajendra Nayak , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robdclark@gmail.com, s.hauer@pengutronix.de, l.stach@pengutronix.de, shawnguo@kernel.org, fabio.estevam@nxp.com, nm@ti.com, xuwei5@hisilicon.com, robh+dt@kernel.org Subject: [PATCH V4 10/12] boot_constraint: Add support for Hisilicon platforms Date: Sun, 29 Oct 2017 19:18:58 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.rc1.236.g92ea95045093 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds boot constraint support for Hisilicon platforms. Currently only one use case is supported: earlycon. One of the UART is enabled by the bootloader and is used for early console in the kernel. The boot constraint core handles it properly and removes constraints once the serial device is probed by its driver. This is tested on hi6220-hikey 96board. Signed-off-by: Viresh Kumar --- arch/arm64/Kconfig.platforms | 1 + drivers/boot_constraints/Makefile | 2 + drivers/boot_constraints/hikey.c | 145 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 148 insertions(+) create mode 100644 drivers/boot_constraints/hikey.c -- 2.15.0.rc1.236.g92ea95045093 diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 6b54ee8c1262..265df4a088ab 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -87,6 +87,7 @@ config ARCH_HISI select ARM_TIMER_SP804 select HISILICON_IRQ_MBIGEN if PCI select PINCTRL + select DEV_BOOT_CONSTRAINTS help This enables support for Hisilicon ARMv8 SoC family diff --git a/drivers/boot_constraints/Makefile b/drivers/boot_constraints/Makefile index 0d4f88bb767c..43c89d2458e9 100644 --- a/drivers/boot_constraints/Makefile +++ b/drivers/boot_constraints/Makefile @@ -1,3 +1,5 @@ # Makefile for device boot constraints obj-y := clk.o deferrable_dev.o core.o pm.o serial.o supply.o + +obj-$(CONFIG_ARCH_HISI) += hikey.o diff --git a/drivers/boot_constraints/hikey.c b/drivers/boot_constraints/hikey.c new file mode 100644 index 000000000000..5f69f9451d93 --- /dev/null +++ b/drivers/boot_constraints/hikey.c @@ -0,0 +1,145 @@ +/* + * This takes care of Hisilicon boot time device constraints, normally set by + * the Bootloader. + * + * Copyright (C) 2017 Linaro. + * Viresh Kumar + * + * This file is released under the GPLv2. + */ + +#include +#include +#include +#include + +struct hikey_machine_constraints { + struct dev_boot_constraint_of *dev_constraints; + unsigned int count; +}; + +static struct dev_boot_constraint_clk_info uart_iclk_info = { + .name = "uartclk", +}; + +static struct dev_boot_constraint_clk_info uart_pclk_info = { + .name = "apb_pclk", +}; + +static struct dev_boot_constraint hikey3660_uart_constraints[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_iclk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_pclk_info, + }, +}; + +static const char * const uarts_hikey3660[] = { + "serial@fff32000", /* UART 6 */ +}; + +static struct dev_boot_constraint_of hikey3660_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3660_uart_constraints, + .count = ARRAY_SIZE(hikey3660_uart_constraints), + + .dev_names = uarts_hikey3660, + .dev_names_count = ARRAY_SIZE(uarts_hikey3660), + }, +}; + +static struct hikey_machine_constraints hikey3660_constraints = { + .dev_constraints = hikey3660_dev_constraints, + .count = ARRAY_SIZE(hikey3660_dev_constraints), +}; + +static const char * const uarts_hikey6220[] = { + "uart@f7113000", /* UART 3 */ +}; + +static struct dev_boot_constraint_of hikey6220_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3660_uart_constraints, + .count = ARRAY_SIZE(hikey3660_uart_constraints), + + .dev_names = uarts_hikey6220, + .dev_names_count = ARRAY_SIZE(uarts_hikey6220), + }, +}; + +static struct hikey_machine_constraints hikey6220_constraints = { + .dev_constraints = hikey6220_dev_constraints, + .count = ARRAY_SIZE(hikey6220_dev_constraints), +}; + +static struct dev_boot_constraint hikey3798cv200_uart_constraints[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &uart_pclk_info, + }, +}; + +static const char * const uarts_hikey3798cv200[] = { + "serial@8b00000", /* UART 0 */ +}; + +static struct dev_boot_constraint_of hikey3798cv200_dev_constraints[] = { + { + .compat = "arm,pl011", + .constraints = hikey3798cv200_uart_constraints, + .count = ARRAY_SIZE(hikey3798cv200_uart_constraints), + + .dev_names = uarts_hikey3798cv200, + .dev_names_count = ARRAY_SIZE(uarts_hikey3798cv200), + }, +}; + +static struct hikey_machine_constraints hikey3798cv200_constraints = { + .dev_constraints = hikey3798cv200_dev_constraints, + .count = ARRAY_SIZE(hikey3798cv200_dev_constraints), +}; + +static const struct of_device_id machines[] __initconst = { + { .compatible = "hisilicon,hi3660", .data = &hikey3660_constraints }, + { .compatible = "hisilicon,hi3798cv200", .data = &hikey3798cv200_constraints }, + { .compatible = "hisilicon,hi6220", .data = &hikey6220_constraints }, + { } +}; + +static int __init hikey_constraints_init(void) +{ + const struct hikey_machine_constraints *constraints; + const struct of_device_id *match; + struct device_node *np; + + if (!boot_constraint_earlycon_enabled()) + return 0; + + np = of_find_node_by_path("/"); + if (!np) + return -ENODEV; + + match = of_match_node(machines, np); + of_node_put(np); + + if (!match) + return 0; + + constraints = match->data; + BUG_ON(!constraints); + + dev_boot_constraint_add_deferrable_of(constraints->dev_constraints, + constraints->count); + + return 0; +} + +/* + * The amba-pl011 driver registers itself from arch_initcall level. Setup the + * serial boot constraints before that in order not to miss any boot messages. + */ +postcore_initcall_sync(hikey_constraints_init);