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[net-next,v2,0/4] enetc: Migrate to PHYLINK and PCS_LYNX

Message ID 20201007094823.6960-1-claudiu.manoil@nxp.com
Headers show
Series enetc: Migrate to PHYLINK and PCS_LYNX | expand

Message

Claudiu Manoil Oct. 7, 2020, 9:48 a.m. UTC 
Transitioning the enetc driver from phylib to phylink.
Offloading the serdes configuration to the PCS_LYNX
module is a mandatory part of this transition. Aiming
for a cleaner, more maintainable design, and better
code reuse.
The first 2 patches are clean up prerequisites.

Tested on a p1028rdb board.

v2: validate() explicitly rejects now all interface modes not
supported by the driver instead of relying on the device tree
to provide only supported interfaces, and dropped redundant
activation of pcs_poll (addressing Ioana's findings)

Claudiu Manoil (4):
  enetc: Clean up MAC and link configuration
  enetc: Clean up serdes configuration
  arm64: dts: fsl-ls1028a-rdb: Specify in-band mode for ENETC port 0
  enetc: Migrate to PHYLINK and PCS_LYNX

 .../boot/dts/freescale/fsl-ls1028a-rdb.dts    |   1 +
 drivers/net/ethernet/freescale/enetc/Kconfig  |   5 +-
 drivers/net/ethernet/freescale/enetc/enetc.c  |  53 ++-
 drivers/net/ethernet/freescale/enetc/enetc.h  |   9 +-
 .../ethernet/freescale/enetc/enetc_ethtool.c  |  26 +-
 .../net/ethernet/freescale/enetc/enetc_pf.c   | 335 ++++++++++--------
 .../net/ethernet/freescale/enetc/enetc_pf.h   |   8 +-
 .../net/ethernet/freescale/enetc/enetc_qos.c  |   9 +-
 8 files changed, 243 insertions(+), 203 deletions(-)

Comments

Vladimir Oltean Oct. 7, 2020, 10:31 a.m. UTC | #1 
On Wed, Oct 07, 2020 at 12:48:22PM +0300, Claudiu Manoil wrote:
> As part of the transition of the enetc ethernet driver from phylib
> to phylink, the in-band operation mode of the SGMII interface
> from enetc port 0 needs to be specified explicitly for phylink.
> 
> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
> ---

Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>

> v3: none

v2, not v3.

> 
>  arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> index c2dc1232f93f..1efb61cff454 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> @@ -199,6 +199,7 @@
>  &enetc_port0 {
>  	phy-handle = <&sgmii_phy0>;
>  	phy-connection-type = "sgmii";
> +	managed = "in-band-status";
>  	status = "okay";
>  
>  	mdio {
> -- 
> 2.17.1
>
Jakub Kicinski Oct. 11, 2020, 6:08 p.m. UTC | #2 
On Wed,  7 Oct 2020 12:48:19 +0300 Claudiu Manoil wrote:
> Transitioning the enetc driver from phylib to phylink.
> Offloading the serdes configuration to the PCS_LYNX
> module is a mandatory part of this transition. Aiming
> for a cleaner, more maintainable design, and better
> code reuse.
> The first 2 patches are clean up prerequisites.
> 
> Tested on a p1028rdb board.
> 
> v2: validate() explicitly rejects now all interface modes not
> supported by the driver instead of relying on the device tree
> to provide only supported interfaces, and dropped redundant
> activation of pcs_poll (addressing Ioana's findings)

Applied, thank you!