From patchwork Tue Dec 1 22:41:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Saeed Mahameed X-Patchwork-Id: 336614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-25.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, INCLUDES_PULL_REQUEST, MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC18FC71155 for ; Tue, 1 Dec 2020 22:43:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 81A2F2067D for ; Tue, 1 Dec 2020 22:43:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="gB36V9Wh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726126AbgLAWnA (ORCPT ); Tue, 1 Dec 2020 17:43:00 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:9866 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725965AbgLAWnA (ORCPT ); Tue, 1 Dec 2020 17:43:00 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Tue, 01 Dec 2020 14:42:20 -0800 Received: from sx1.mtl.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 1 Dec 2020 22:42:19 +0000 From: Saeed Mahameed To: Jakub Kicinski CC: "David S. Miller" , , "Saeed Mahameed" Subject: [pull request][net-next 00/15] mlx5 updates 2020-12-01 Date: Tue, 1 Dec 2020 14:41:53 -0800 Message-ID: <20201201224208.73295-1-saeedm@nvidia.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1606862540; bh=mntawPTicpxNDSTomo2rYwZfRYE3+KyW87qmyPq1BCk=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:MIME-Version: Content-Transfer-Encoding:Content-Type:X-Originating-IP: X-ClientProxiedBy; b=gB36V9WhdC9dHPa898Wxeh+xv7C4D6X0ECs+wGzkzrgHGtDL+Vf7JhK7nxjUrs5Qa NGI8FRKB9qr0968xYUqfnChU/BETCQXNsnbcNd6pa1c04LlsKoXAIPw8GQgzYQRh50 6pzmNMPO8TYwezDoOTlJJNgWRiCZcUUzjaWeRCeQPKDs9BXFr0irCwE6eHVJt4wa+X DUo1kAH9r50uuub7LHw7ib9ZJ3lkhObOsH0qsdvgTqkBWoMGHI5oC0Zfbh0DZRifcN 9dedUPdfQ9hzAI4YhSyrc+/DtNuG7kyvNBbddgbvLA4Tt4hstGU3dJxqQkpl/TNTl5 AI5QohSqmGHkQ== Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hi Jakub, This series adds port tx timestamping support and some misc updates. For more information please see tag log below. Please pull and let me know if there is any problem. Please note that the series starts with a merge of mlx5-next branch, to resolve and avoid dependency with rdma tree. Thanks, Saeed. --- The following changes since commit e4518eed11ce8166d038d187a0234aa5dac4bdf4: Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux (2020-12-01 14:25:07 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux.git tags/mlx5-updates-2020-12-01 for you to fetch changes up to 6bf811819936059562d46f18bf9f908ccb0e4624: net/mlx5e: Fill mlx5e_create_cq_param in a function (2020-12-01 14:25:16 -0800) ---------------------------------------------------------------- mlx5-updates-2020-12-01 mlx5e port TX timestamping support and MISC updates 1) Add support for port TX timestamping, for better PTP accuracy. Currently in mlx5 HW TX timestamping is done on CQE (TX completion) generation, which much earlier than when the packet actually goes out to the wire, in this series Eran implements the option to do timestamping on the port using a special SQ (Send Queue), such Send Queue will generate 2 CQEs (TX completions), the original one and a new one when the packet leaves the port, due to the nature of this special handling, such mechanism is an opt-in only and it is off by default to avoid any performance degradation on normal traffic flows. 2) Misc updates and trivial improvements. ---------------------------------------------------------------- Aya Levin (3): net/mlx5e: Allow CQ outside of channel context net/mlx5e: Allow RQ outside of channel context net/mlx5e: Split between RX/TX tunnel FW support indication Eran Ben Elisha (6): net/mlx5e: Allow SQ outside of channel context net/mlx5e: Change skb fifo push/pop API to be used without SQ net/mlx5e: Split SW group counters update function net/mlx5e: Move MLX5E_RX_ERR_CQE macro net/mlx5e: Add TX PTP port object support net/mlx5e: Add TX port timestamp support Maxim Mikityanskiy (1): net/mlx5e: Fill mlx5e_create_cq_param in a function Shay Drory (1): net/mlx5: Arm only EQs with EQEs Tariq Toukan (1): net/mlx5e: Free drop RQ in a dedicated function YueHaibing (2): net/mlx5e: Remove duplicated include net/mlx5: Fix passing zero to 'PTR_ERR' Zhu Yanjun (1): net/mlx5e: remove unnecessary memset drivers/net/ethernet/mellanox/mlx5/core/Makefile | 2 +- drivers/net/ethernet/mellanox/mlx5/core/en.h | 63 ++- drivers/net/ethernet/mellanox/mlx5/core/en/fs.h | 3 +- .../net/ethernet/mellanox/mlx5/core/en/health.c | 16 +- .../net/ethernet/mellanox/mlx5/core/en/health.h | 7 +- .../net/ethernet/mellanox/mlx5/core/en/params.h | 10 + drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c | 529 +++++++++++++++++++++ drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h | 63 +++ .../ethernet/mellanox/mlx5/core/en/reporter_rx.c | 52 +- .../ethernet/mellanox/mlx5/core/en/reporter_tx.c | 215 +++++++-- drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 19 +- .../net/ethernet/mellanox/mlx5/core/en/xsk/setup.c | 9 +- .../mellanox/mlx5/core/en_accel/tls_rxtx.c | 2 +- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 33 ++ drivers/net/ethernet/mellanox/mlx5/core/en_fs.c | 20 +- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 252 ++++++---- drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 29 +- drivers/net/ethernet/mellanox/mlx5/core/en_stats.c | 403 +++++++++++----- drivers/net/ethernet/mellanox/mlx5/core/en_stats.h | 11 + drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | 77 ++- drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | 5 +- drivers/net/ethernet/mellanox/mlx5/core/eq.c | 6 +- .../mellanox/mlx5/core/esw/acl/egress_lgcy.c | 2 +- .../mellanox/mlx5/core/esw/acl/egress_ofld.c | 2 +- .../mellanox/mlx5/core/esw/acl/ingress_lgcy.c | 2 +- .../mellanox/mlx5/core/esw/acl/ingress_ofld.c | 2 +- .../ethernet/mellanox/mlx5/core/eswitch_offloads.c | 1 - 27 files changed, 1485 insertions(+), 350 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h