[v2,0/2] net: Add LiteETH network driver

This adds a driver for the LiteX network device, LiteEth.

v2 Addresses feedback from Jakub, with detailed changes in each patch.

It also moves to the litex register accessors so the system works on big
endian litex platforms. I tested with mor1k on an Arty A7-100T.

I have removed the mdio aspects of the driver as they are not needed for
basic operation. I will continue to work on adding support in the
future, but I don't think it needs to block the mac driver going in.

The binding describes the mdio registers, and has been fixed to not show
any warnings against dtschema master.

LiteEth is a simple driver for the FPGA based Ethernet device used in various
RISC-V, PowerPC's microwatt, OpenRISC's mor1k and other FPGA based
systems on chip.

Joel Stanley (2):
  dt-bindings: net: Add bindings for LiteETH
  net: Add driver for LiteX's LiteETH network interface

 .../bindings/net/litex,liteeth.yaml           |  79 +++++
 drivers/net/ethernet/Kconfig                  |   1 +
 drivers/net/ethernet/Makefile                 |   1 +
 drivers/net/ethernet/litex/Kconfig            |  27 ++
 drivers/net/ethernet/litex/Makefile           |   5 +
 drivers/net/ethernet/litex/litex_liteeth.c    | 327 ++++++++++++++++++
 6 files changed, 440 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
 create mode 100644 drivers/net/ethernet/litex/Kconfig
 create mode 100644 drivers/net/ethernet/litex/Makefile
 create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c

On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
> LiteETH is a small footprint and configurable Ethernet core for FPGA
> based system on chips.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
> v2:
>  - Fix dtschema check warning relating to registers
>  - Add names to the registers to make it easier to distinguish which is
>    what region
>  - Add mdio description
>  - Includ ethernet-controller parent description
> 
>  .../bindings/net/litex,liteeth.yaml           | 79 +++++++++++++++++++
>  1 file changed, 79 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml
> new file mode 100644
> index 000000000000..30f8f8b0b657
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/litex,liteeth.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: LiteX LiteETH ethernet device
> +
> +maintainers:
> +  - Joel Stanley <joel@jms.id.au>
> +
> +description: |
> +  LiteETH is a small footprint and configurable Ethernet core for FPGA based
> +  system on chips.
> +
> +  The hardware source is Open Source and can be found on at
> +  https://github.com/enjoy-digital/liteeth/.
> +
> +allOf:
> +  - $ref: ethernet-controller.yaml#
> +
> +properties:
> +  compatible:
> +    const: litex,liteeth
> +
> +  reg:
> +    minItems: 3
> +    items:
> +      - description: MAC registers
> +      - description: MDIO registers
> +      - description: Packet buffer
> +
> +  reg-names:
> +    minItems: 3

Need to define the names here.

> +
> +  interrupts:
> +    maxItems: 1
> +

> +  rx-fifo-depth: true
> +  tx-fifo-depth: true

Needs a vendor prefix, type, description and constraints.

> +  mac-address: true
> +  local-mac-address: true
> +  phy-handle: true
> +
> +  mdio:
> +    $ref: mdio.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    mac: ethernet@8020000 {
> +        compatible = "litex,liteeth";
> +        reg = <0x8021000 0x100>,
> +              <0x8020800 0x100>,
> +              <0x8030000 0x2000>;
> +        reg-names = "mac", "mdio", "buffer";
> +        rx-fifo-depth = <1024>;
> +        tx-fifo-depth = <1024>;
> +        interrupts = <0x11 0x1>;
> +        phy-handle = <&eth_phy>;
> +
> +        mdio {
> +          #address-cells = <1>;
> +          #size-cells = <0>;
> +
> +          eth_phy: ethernet-phy@0 {
> +            reg = <0>;
> +          };
> +        };
> +    };
> +...
> +
> +#  vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :
> -- 
> 2.32.0
> 
>

On Mon, 23 Aug 2021 at 18:44, Rob Herring <robh@kernel.org> wrote:
>
> On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:

> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
>
> > +  rx-fifo-depth: true
> > +  tx-fifo-depth: true
>
> Needs a vendor prefix, type, description and constraints.

These are the standard properties from the ethernet-controller.yaml. I
switched the driver to using those once I discovered they existed (v1
defined these in terms of slots, whereas the ethernet-controller
bindings use bytes).

Cheers,

Joel

On Mon, Aug 23, 2021 at 10:52 PM Joel Stanley <joel@jms.id.au> wrote:
>
> On Mon, 23 Aug 2021 at 18:44, Rob Herring <robh@kernel.org> wrote:
> >
> > On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
>
> > > +
> > > +  interrupts:
> > > +    maxItems: 1
> > > +
> >
> > > +  rx-fifo-depth: true
> > > +  tx-fifo-depth: true
> >
> > Needs a vendor prefix, type, description and constraints.
>
> These are the standard properties from the ethernet-controller.yaml. I
> switched the driver to using those once I discovered they existed (v1
> defined these in terms of slots, whereas the ethernet-controller
> bindings use bytes).

Indeed (grepping the wrong repo didn't work too well :) ).

Still, I'd assume there's some valid range for this h/w you can
define? Or 0 - 2^32 is valid?

Rob