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[Xen-devel,MM-PART1,v3,0/8] xen/arm: TLB flush helpers rework

Message ID 20190514121132.26732-1-julien.grall@arm.com
Headers show
Series xen/arm: TLB flush helpers rework | expand

Message

Julien Grall May 14, 2019, 12:11 p.m. UTC
Hi all,

I spent the last few months looking at Xen boot and memory management to make
it simpler, more efficient and also more compliant in respect of the Arm Arm.

The full rework is quite consequence (already 150 patches and I haven't yet
finished!), so I am planning to send in smaller part over the next few weeks.

In this first part, I focus on reworking how we flush the TLBs in Xen.

The main addition for this version is to prevent Xen booting on AIVIVT
instruction caches (see patch #1). For all the other changes, see each patch.

Cheers,

Julien Grall (8):
  xen/arm: Don't boot Xen on platform using AIVIVT instruction caches
  xen/arm: mm: Consolidate setting SCTLR_EL2.WXN in a single place
  xen/arm: Remove flush_xen_text_tlb_local()
  xen/arm: tlbflush: Clarify the TLB helpers name
  xen/arm: page: Clarify the Xen TLBs helpers name
  xen/arm: Gather all TLB flush helpers in tlbflush.h
  xen/arm: tlbflush: Rework TLB helpers
  xen/arm: mm: Flush the TLBs even if a mapping failed in
    create_xen_entries

 xen/arch/arm/mm.c                    | 69 ++++++++++++++++++++++-----------
 xen/arch/arm/p2m.c                   |  6 +--
 xen/arch/arm/setup.c                 |  5 +++
 xen/arch/arm/smp.c                   |  2 +-
 xen/arch/arm/traps.c                 |  2 +-
 xen/include/asm-arm/arm32/flushtlb.h | 71 +++++++++++++++++++---------------
 xen/include/asm-arm/arm32/page.h     | 48 ++++-------------------
 xen/include/asm-arm/arm64/flushtlb.h | 75 ++++++++++++++++++++----------------
 xen/include/asm-arm/arm64/page.h     | 49 +++--------------------
 xen/include/asm-arm/flushtlb.h       | 38 ++++++++++++++++++
 xen/include/asm-arm/page.h           | 38 ------------------
 xen/include/asm-arm/processor.h      |  5 +++
 12 files changed, 194 insertions(+), 214 deletions(-)

Comments

Julien Grall June 12, 2019, 3:15 p.m. UTC | #1
Hi,

This patch is fully committed now.

Thank you for the reviews!

Cheers,

On 14/05/2019 13:11, Julien Grall wrote:
> Hi all,
> 
> I spent the last few months looking at Xen boot and memory management to make
> it simpler, more efficient and also more compliant in respect of the Arm Arm.
> 
> The full rework is quite consequence (already 150 patches and I haven't yet
> finished!), so I am planning to send in smaller part over the next few weeks.
> 
> In this first part, I focus on reworking how we flush the TLBs in Xen.
> 
> The main addition for this version is to prevent Xen booting on AIVIVT
> instruction caches (see patch #1). For all the other changes, see each patch.
> 
> Cheers,
> 
> Julien Grall (8):
>    xen/arm: Don't boot Xen on platform using AIVIVT instruction caches
>    xen/arm: mm: Consolidate setting SCTLR_EL2.WXN in a single place
>    xen/arm: Remove flush_xen_text_tlb_local()
>    xen/arm: tlbflush: Clarify the TLB helpers name
>    xen/arm: page: Clarify the Xen TLBs helpers name
>    xen/arm: Gather all TLB flush helpers in tlbflush.h
>    xen/arm: tlbflush: Rework TLB helpers
>    xen/arm: mm: Flush the TLBs even if a mapping failed in
>      create_xen_entries
> 
>   xen/arch/arm/mm.c                    | 69 ++++++++++++++++++++++-----------
>   xen/arch/arm/p2m.c                   |  6 +--
>   xen/arch/arm/setup.c                 |  5 +++
>   xen/arch/arm/smp.c                   |  2 +-
>   xen/arch/arm/traps.c                 |  2 +-
>   xen/include/asm-arm/arm32/flushtlb.h | 71 +++++++++++++++++++---------------
>   xen/include/asm-arm/arm32/page.h     | 48 ++++-------------------
>   xen/include/asm-arm/arm64/flushtlb.h | 75 ++++++++++++++++++++----------------
>   xen/include/asm-arm/arm64/page.h     | 49 +++--------------------
>   xen/include/asm-arm/flushtlb.h       | 38 ++++++++++++++++++
>   xen/include/asm-arm/page.h           | 38 ------------------
>   xen/include/asm-arm/processor.h      |  5 +++
>   12 files changed, 194 insertions(+), 214 deletions(-)
>