From patchwork Sun Feb 28 11:19:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 63153 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp731352lbc; Sun, 28 Feb 2016 03:25:49 -0800 (PST) X-Received: by 10.55.209.148 with SMTP id o20mr12948122qkl.5.1456658736980; Sun, 28 Feb 2016 03:25:36 -0800 (PST) Return-Path: Received: from lists.xen.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id z192si21651167qka.1.2016.02.28.03.25.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 28 Feb 2016 03:25:36 -0800 (PST) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.84) (envelope-from ) id 1aZzSL-0005S3-7X; Sun, 28 Feb 2016 11:24:09 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.84) (envelope-from ) id 1aZzSJ-0005R3-2y for xen-devel@lists.xen.org; Sun, 28 Feb 2016 11:24:07 +0000 Received: from [85.158.139.211] by server-2.bemta-5.messagelabs.com id 2A/33-03303-6D8D2D65; Sun, 28 Feb 2016 11:24:06 +0000 X-Env-Sender: zhaoshenglong@huawei.com X-Msg-Ref: server-3.tower-206.messagelabs.com!1456658631!25475951!1 X-Originating-IP: [58.251.152.64] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 45678 invoked from network); 28 Feb 2016 11:24:05 -0000 Received: from szxga01-in.huawei.com (HELO szxga01-in.huawei.com) (58.251.152.64) by server-3.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 28 Feb 2016 11:24:05 -0000 Received: from 172.24.1.48 (EHLO szxeml432-hub.china.huawei.com) ([172.24.1.48]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DFJ26948; Sun, 28 Feb 2016 19:20:37 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml432-hub.china.huawei.com (10.82.67.209) with Microsoft SMTP Server id 14.3.235.1; Sun, 28 Feb 2016 19:20:30 +0800 From: Shannon Zhao To: Date: Sun, 28 Feb 2016 19:19:15 +0800 Message-ID: <1456658360-16080-20-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1456658360-16080-1-git-send-email-zhaoshenglong@huawei.com> References: <1456658360-16080-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020205.56D2D805.009F, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 22e5ce6a1939dd6f97f202594582075d Cc: peter.huangpeng@huawei.com, zhaoshenglong@huawei.com, stefano.stabellini@citrix.com, ian.campbell@citrix.com, shannon.zhao@linaro.org Subject: [Xen-devel] [PATCH v4 19/24] arm/acpi: Configure SPI interrupt type and route to Dom0 dynamically X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" From: Shannon Zhao Interrupt information is described in DSDT and is not available at the time of booting. Check if the interrupt is permitted to access and set the interrupt type, route it to guest dynamically only for SPI and Dom0. Signed-off-by: Parth Dixit Signed-off-by: Shannon Zhao --- xen/arch/arm/vgic.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index ee35683..902a16d 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include @@ -334,6 +336,8 @@ void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n) } } +#define VGIC_ICFG_MASK(intr) ( 1 << ( ( 2 * ( intr % 16 ) ) + 1 ) ) + void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) { const unsigned long mask = r; @@ -342,9 +346,37 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) unsigned long flags; int i = 0; struct vcpu *v_target; +#ifdef CONFIG_HAS_ACPI + struct domain *d = v->domain; + struct vgic_irq_rank *vr = vgic_get_rank(v, n); + uint32_t tr; + int ret; +#endif while ( (i = find_next_bit(&mask, 32, i)) < 32 ) { irq = i + (32 * n); +#ifdef CONFIG_HAS_ACPI + /* Set the irq type and route it to guest only for SPI and Dom0 */ + if( irq_access_permitted(d, irq) && is_hardware_domain(d) && + ( irq >= 32 ) && ( !acpi_disabled ) ) + { + tr = vr->icfg[i >> 4]; + + if ( tr & VGIC_ICFG_MASK(i) ) + ret = irq_set_spi_type(irq, IRQ_TYPE_EDGE_BOTH); + else + ret = irq_set_spi_type(irq, IRQ_TYPE_LEVEL_MASK); + if ( ret ) + printk(XENLOG_WARNING "The irq type is not correct\n"); + + vgic_reserve_virq(d, irq); + + ret = route_irq_to_guest(d, irq, irq, NULL); + if ( ret ) + printk(XENLOG_ERR "Unable to route IRQ %u to domain %u\n", + irq, d->domain_id); + } +#endif v_target = __vgic_get_target_vcpu(v, irq); p = irq_to_pending(v_target, irq); set_bit(GIC_IRQ_GUEST_ENABLED, &p->status);