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[192.237.175.120]) by mx.google.com with ESMTPS id 72si3758485uar.146.2016.03.25.06.51.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 Mar 2016 06:51:04 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ajS88-00023N-CX; Fri, 25 Mar 2016 13:50:24 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ajS86-00021j-W8 for xen-devel@lists.xen.org; Fri, 25 Mar 2016 13:50:23 +0000 Received: from [85.158.137.68] by server-12.bemta-3.messagelabs.com id 06/55-19343-E1245F65; Fri, 25 Mar 2016 13:50:22 +0000 X-Env-Sender: shannon.zhao@linaro.org X-Msg-Ref: server-4.tower-31.messagelabs.com!1458913820!21782938!1 X-Originating-IP: [209.85.192.172] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.11; banners=-,-,- X-VirusChecked: Checked Received: (qmail 9967 invoked from network); 25 Mar 2016 13:50:21 -0000 Received: from mail-pf0-f172.google.com (HELO mail-pf0-f172.google.com) (209.85.192.172) by server-4.tower-31.messagelabs.com with AES128-GCM-SHA256 encrypted SMTP; 25 Mar 2016 13:50:21 -0000 Received: by mail-pf0-f172.google.com with SMTP id x3so83284279pfb.1 for ; Fri, 25 Mar 2016 06:50:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DfxI9WB5+zFV8S6LscAYUxmOQCLiWmyKtwJ9WMFPrjE=; b=SR7jum/L9CcVZsJiD40ml1fvrNM1sZIWtvA7lMqoqXbhPXccIvXsomOfbcl0i1sYs1 wR2OOPbvrWmMYNcFtOT/JckIEtjsiwZSE0VC0v5lQDcxbJCr/9qQlT61DJ61rvNOZaH6 PqfEv8lFZ4f+5/bfjM81hhgO+orM0f1UFh/A8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DfxI9WB5+zFV8S6LscAYUxmOQCLiWmyKtwJ9WMFPrjE=; b=RrM7LVVZa4ynrSoWQmbvLc1q3hxfZvFi6mREzqsVa1IrXHY6E0nsF41cVMuZbUnEhM QJWE+wf5eYo3gAignhyT4Vn5XcwaEUQEQweqEHRAgcl55kfjG+SZRInoZ3oSM9nydfoW FXrWwueGKogWrJaZo6h/mk0DSQCVaxLlawW4+qOhYV2bIozI7aL32qZN+uz76CdyhBxh zDUDAjec5qs/jmjnBzT+N5+8KBbERWoCf3b8v+N2b3rqh6y40QRLCGMBn6P7urSMRlJ2 NrOEz0jtTwZwfwlsfNuKksCaB4PRGo5kZIGHPzQDn78AxWmGu/5za9xRdLMFzI5SC7bF FQrQ== X-Gm-Message-State: AD7BkJJgsK+ecxr8wxNQGta+I3FJVuRfzyYorE7nBOC2RO5TRgfT5Ni6cJqZwgCGOH1xnvqL X-Received: by 10.98.76.194 with SMTP id e63mr21507563pfj.89.1458913820082; Fri, 25 Mar 2016 06:50:20 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.2]) by smtp.gmail.com with ESMTPSA id w20sm16744178pfi.31.2016.03.25.06.50.16 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 25 Mar 2016 06:50:19 -0700 (PDT) From: Shannon Zhao To: xen-devel@lists.xen.org Date: Fri, 25 Mar 2016 21:48:49 +0800 Message-Id: <1458913735-2678-17-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1458913735-2678-1-git-send-email-shannon.zhao@linaro.org> References: <1458913735-2678-1-git-send-email-shannon.zhao@linaro.org> Cc: julien.grall@arm.com, shannon.zhao@linaro.org, stefano.stabellini@citrix.com, peter.huangpeng@huawei.com, zhaoshenglong@huawei.com Subject: [Xen-devel] [PATCH v7 16/22] arm/acpi: Configure SPI interrupt type and route to Dom0 dynamically X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Interrupt information is described in DSDT and is not available at the time of booting. Check if the interrupt is permitted to access and set the interrupt type, route it to guest dynamically only for SPI and Dom0. Signed-off-by: Parth Dixit Signed-off-by: Shannon Zhao Reviewed-by: Stefano Stabellini Acked-by: Julien Grall --- xen/arch/arm/vgic.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index ee35683..aa420bb 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include @@ -334,6 +336,19 @@ void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n) } } +#define VGIC_ICFG_MASK(intr) (1 << ((2 * ((intr) % 16)) + 1)) + +static inline unsigned int get_the_irq_type(struct vcpu *v, int n, int index) +{ + struct vgic_irq_rank *vr = vgic_get_rank(v, n); + uint32_t tr = vr->icfg[index >> 4]; + + if ( tr & VGIC_ICFG_MASK(index) ) + return IRQ_TYPE_EDGE_BOTH; + else + return IRQ_TYPE_LEVEL_MASK; +} + void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) { const unsigned long mask = r; @@ -342,9 +357,26 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) unsigned long flags; int i = 0; struct vcpu *v_target; + struct domain *d = v->domain; + int ret; while ( (i = find_next_bit(&mask, 32, i)) < 32 ) { irq = i + (32 * n); + /* Set the irq type and route it to guest only for SPI and Dom0 */ + if( irq_access_permitted(d, irq) && is_hardware_domain(d) && + ( irq >= 32 ) && ( !acpi_disabled ) ) + { + ret = irq_set_spi_type(irq, get_the_irq_type(v, n, i)); + if ( ret ) + gprintk(XENLOG_WARNING, "The irq type is not correct\n"); + + vgic_reserve_virq(d, irq); + + ret = route_irq_to_guest(d, irq, irq, NULL); + if ( ret ) + gprintk(XENLOG_ERR, "Unable to route IRQ %u to domain %u\n", + irq, d->domain_id); + } v_target = __vgic_get_target_vcpu(v, irq); p = irq_to_pending(v_target, irq); set_bit(GIC_IRQ_GUEST_ENABLED, &p->status);