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[192.237.175.120]) by mx.google.com with ESMTPS id v128si5856677ita.25.2016.12.07.04.36.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Dec 2016 04:36:00 -0800 (PST) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cEbQL-0006DX-5R; Wed, 07 Dec 2016 12:34:13 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cEbQK-0006CV-6V for xen-devel@lists.xen.org; Wed, 07 Dec 2016 12:34:12 +0000 Received: from [85.158.137.68] by server-16.bemta-3.messagelabs.com id CD/BF-12362-3C108485; Wed, 07 Dec 2016 12:34:11 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOLMWRWlGSWpSXmKPExsVysyfVTfcQo0e Ewc9nFhZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa0bvnh7mgl0iFcuv9TI1ML4S6GLk4hAS2Mwo 8WrXI2YI5zSjxNMT0xi7GDk52AQ0Je58/sQEYosISEtc+3wZLM4s4CDx5uM9FhBbWCBY4uuSL lYQm0VAVaKrdSoziM0r4CpxasohsBoJATmJk8cmg9VwAsVvff0LFhcScJH42rSMZQIj9wJGhl WMGsWpRWWpRbqGBnpJRZnpGSW5iZk5QJ6xXm5qcXFiempOYlKxXnJ+7iZGoIfrGRgYdzBu63I +xCjJwaQkyrtrgnuEEF9SfkplRmJxRnxRaU5q8SFGGQ4OJQneRQweEUKCRanpqRVpmTnAUINJ S3DwKInw7vsP1MpbXJCYW5yZDpE6xagoJc47F6RPACSRUZoH1wYL70uMslLCvIwMDAxCPAWpR bmZJajyrxjFORiVhHm5QKbwZOaVwE1/BbSYCWjxvBtgi0sSEVJSDYxzy5p3v5GbMencn60VG2 fo8z8qPXuibVFRzIaJD75EhRb+2ba888b37x9O7arvXMFXyhx0W7zjS1NdZBy3evcyi475wvo ly9NaHL1yHsmKlHdMTb+SwJ4uZTlr4g/hSVfdGfddXsgjc+/wDOvy30UXJfM1Aw60NRy9oXr+ tjtvhqbBnitHbl9WYinOSDTUYi4qTgQART/O9WoCAAA= X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-14.tower-31.messagelabs.com!1481114050!74915599!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Received: X-StarScan-Version: 9.0.16; banners=-,-,- X-VirusChecked: Checked Received: (qmail 26643 invoked from network); 7 Dec 2016 12:34:10 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-14.tower-31.messagelabs.com with SMTP; 7 Dec 2016 12:34:10 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2D166154D; Wed, 7 Dec 2016 04:34:10 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.218.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8D3AB3F477; Wed, 7 Dec 2016 04:34:09 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 7 Dec 2016 12:33:51 +0000 Message-Id: <1481114033-11024-12-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481114033-11024-1-git-send-email-julien.grall@arm.com> References: <1481114033-11024-1-git-send-email-julien.grall@arm.com> Cc: Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" We will want to emulate co-processor registers access in a follow-up patch. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/vgic-v3.c | 13 ++++++++++++- xen/arch/arm/vgic.c | 4 ++-- xen/include/asm-arm/vgic.h | 4 ++-- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index e54df0b..f3f0bd2 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -1328,6 +1328,17 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr) } } +static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr) +{ + switch (hsr.ec) + { + case HSR_EC_SYSREG: + return vgic_v3_emulate_sysreg(regs, hsr); + default: + return false; + } +} + static const struct mmio_handler_ops vgic_rdistr_mmio_handler = { .read = vgic_v3_rdistr_mmio_read, .write = vgic_v3_rdistr_mmio_write, @@ -1491,7 +1502,7 @@ static const struct vgic_ops v3_ops = { .vcpu_init = vgic_v3_vcpu_init, .domain_init = vgic_v3_domain_init, .domain_free = vgic_v3_domain_free, - .emulate_sysreg = vgic_v3_emulate_sysreg, + .emulate_reg = vgic_v3_emulate_reg, /* * We use both AFF1 and AFF0 in (v)MPIDR. Thus, the max number of CPU * that can be supported is up to 4096(==256*16) in theory. diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 196e86b..364d5f0 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -550,9 +550,9 @@ bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr) { struct vcpu *v = current; - ASSERT(v->domain->arch.vgic.handler->emulate_sysreg != NULL); + ASSERT(v->domain->arch.vgic.handler->emulate_reg != NULL); - return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr); + return v->domain->arch.vgic.handler->emulate_reg(regs, hsr); } bool vgic_reserve_virq(struct domain *d, unsigned int virq) diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index fadb1e1..672f649 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -130,8 +130,8 @@ struct vgic_ops { int (*domain_init)(struct domain *d); /* Release resources that were allocated by domain_init */ void (*domain_free)(struct domain *d); - /* vGIC sysreg emulation */ - bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr); + /* vGIC sysreg/cpregs emulate */ + bool (*emulate_reg)(struct cpu_user_regs *regs, union hsr hsr); /* Maximum number of vCPU supported */ const unsigned int max_vcpus; };