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[209.85.220.65]) by mx.google.com with SMTPS id w21-v6sor405509pgk.76.2018.08.02.03.53.06 for (Google Transport Security); Thu, 02 Aug 2018 03:53:06 -0700 (PDT) Received-SPF: pass (google.com: domain of sumit.garg@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EEbFpsOh; spf=pass (google.com: domain of sumit.garg@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=sumit.garg@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=jlyenogbp0Uru3jwaqO4ny8iOCXibNLk9AuycVt0/WU=; b=EEbFpsOh23iN7MckPjXt3jC92ZAaciXcWWYzSIBnNirCiahG12+YzI6SRf7DL52cYA GRVqy5hswWcz967EeGvOb1xEgsj4t1+ETmA+n0WPcPYac8YlT1gHF7VU2HlpKK4A8k72 8XvBfd5oIib8+8tiCC8Ln12iBGwsVQr6A6v0A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=jlyenogbp0Uru3jwaqO4ny8iOCXibNLk9AuycVt0/WU=; b=BGPq4QB0RldWjLM0tGyB3WT2uX02rOKF3DglA+XOAvg9/9i4J+oitTdmbrU/rGQKyV NYw2bD3k2LufMeC+g1Hy6mGY41t+FNbLX4LUahibil1XclcCHQzDCqoyVPFfBxjCGPPE t6Q79tfnYNMZg7EjFXsPb4ghAQzru0V0ePmbx8BqMhiTogqX5pcbCu8Xr/io8psRZ76J rvLOGGy/joOnt/JibrqiL9nG8Ar4Y6cXTCQmkW+JN9jl2X0RgdtefZq2qu1HeHS5A0vC uI6xWXqMj2NvTC/FC1YuNiJQXL5J5qNl8GpQ/bpeuNKSCX2mfk6A18/ErLyFNBbF3y/n o2KQ== X-Gm-Message-State: AOUpUlFaE8BRzJvOH8lpcB6YsRzD7OjX/7R1xjuIRFb3QxUz6foP2UVn ha/dvFC82ZFpYtywRJDmIlQxm5YSwPGd5w== X-Google-Smtp-Source: AAOMgpeXoYpDP9vl74ft+xCqWulVhyz/JaQDEbtfkX4grjw84MMYaqDE4VfN73pJlklUXoTn1tOCXw== X-Received: by 2002:a63:e056:: with SMTP id n22-v6mr2248465pgj.205.1533207186170; Thu, 02 Aug 2018 03:53:06 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([117.197.43.141]) by smtp.gmail.com with ESMTPSA id b67-v6sm3426580pfd.74.2018.08.02.03.53.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 02 Aug 2018 03:53:05 -0700 (PDT) From: Sumit Garg To: daniel.thompson@linaro.org, ard.biesheuvel@linaro.org Cc: patches@linaro.org, Sumit Garg Subject: [edk2][PATCH edk2-platforms 1/2] Silicon/SynQuacer: add optional OP-TEE DT node Date: Thu, 2 Aug 2018 16:22:37 +0530 Message-Id: <1533207158-18652-1-git-send-email-sumit.garg@linaro.org> X-Mailer: git-send-email 2.7.4 OP-TEE is optional on Developerbox controlled via SCP firmware. To check if we need to enable OP-TEE DT node, we use "IsOpteePresent" OpteeLib api. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sumit Garg --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 1 + .../Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +++++++ .../SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c | 28 ++++++++++++++++++++++ .../SynQuacerDtbLoaderLib.inf | 2 ++ 4 files changed, 39 insertions(+) -- 2.7.4 Reviewed-by: Ard Biesheuvel diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc index fc498eb65217..4ff5df978e8e 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -76,6 +76,7 @@ [LibraryClasses.common] ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf + OpteeLib|ArmPkg/Library/OpteeLib/OpteeLib.inf BaseLib|MdePkg/Library/BaseLib/BaseLib.inf BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 37d642e4b237..d6a5f013e58c 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -574,6 +574,14 @@ #address-cells = <1>; #size-cells = <0>; }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + status = "disabled"; + }; + }; }; #include "SynQuacerCaches.dtsi" diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c index 897d06743708..77db30c204fe 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c @@ -19,6 +19,7 @@ #include #include #include +#include #include // add enough space for three instances of 'status = "disabled"' @@ -47,6 +48,29 @@ DisableDtNode ( } } +STATIC +VOID +EnableDtNode ( + IN VOID *Dtb, + IN CONST CHAR8 *NodePath + ) +{ + INT32 Node; + INT32 Rc; + + Node = fdt_path_offset (Dtb, NodePath); + if (Node < 0) { + DEBUG ((DEBUG_ERROR, "%a: failed to locate DT path '%a': %a\n", + __FUNCTION__, NodePath, fdt_strerror (Node))); + return; + } + Rc = fdt_setprop_string (Dtb, Node, "status", "okay"); + if (Rc < 0) { + DEBUG ((DEBUG_ERROR, "%a: failed to set status to 'disabled' on '%a': %a\n", + __FUNCTION__, NodePath, fdt_strerror (Rc))); + } +} + /** Return a pool allocated copy of the DTB image that is appropriate for booting the current platform via DT. @@ -107,6 +131,10 @@ DtPlatformLoadDtb ( DisableDtNode (CopyDtb, "/sdhci@52300000"); } + if (IsOpteePresent()) { + EnableDtNode (CopyDtb, "/firmware/optee"); + } + *Dtb = CopyDtb; *DtbSize = CopyDtbSize; diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf index 548d62fd5c0a..fd21f7c376ce 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf @@ -24,6 +24,7 @@ [Sources] SynQuacerDtbLoaderLib.c [Packages] + ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec EmbeddedPkg/EmbeddedPkg.dec Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -34,6 +35,7 @@ [LibraryClasses] DxeServicesLib FdtLib MemoryAllocationLib + OpteeLib [Pcd] gSynQuacerTokenSpaceGuid.PcdPcieEnableMask