From patchwork Thu May 4 17:54:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 98555 Delivered-To: patch@linaro.org Received: by 10.140.89.200 with SMTP id v66csp731098qgd; Thu, 4 May 2017 10:56:34 -0700 (PDT) X-Received: by 10.36.48.5 with SMTP id q5mr3828544itq.15.1493920594307; Thu, 04 May 2017 10:56:34 -0700 (PDT) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id o1si24618010iof.28.2017.05.04.10.56.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 04 May 2017 10:56:34 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1d6Kxc-0002Kt-Ro; Thu, 04 May 2017 17:54:40 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1d6Kxb-0002KW-Q6 for xen-devel@lists.xen.org; Thu, 04 May 2017 17:54:39 +0000 Received: from [85.158.143.35] by server-8.bemta-6.messagelabs.com id 6E/C3-03696-FDA6B095; Thu, 04 May 2017 17:54:39 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMLMWRWlGSWpSXmKPExsVysyfVTfdeFne kwc3NshZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8buFsuCP3IVq5/fYGxg3CXexcjFISSwmVFi fu9mJgjnNKPE7Uk/gBxODjYBTYk7nz+B2SIC0hLXPl9mBLGZBRwk3ny8xwJiCwuESrz5doO9i 5GDg0VAVeL0fVcQk1fAUqJ7Ug1IhYSAvMSutousIDangJXE3K2tzCAlQkAlX1s0JjByL2BkWM WoUZxaVJZapGtoqZdUlJmeUZKbmJmja2hgppebWlycmJ6ak5hUrJecn7uJEehZBiDYwfhjWcA hRkkOJiVRXvVX7JFCfEn5KZUZicUZ8UWlOanFhxhlODiUJHgFgYEiJFiUmp5akZaZAwwxmLQE B4+SCC8TSJq3uCAxtzgzHSJ1ilFRSpz3XyZQQgAkkVGaB9cGC+tLjLJSwryMQIcI8RSkFuVml qDKv2IU52BUEubNBZnCk5lXAjf9FdBiJqDFzbIcIItLEhFSUg2MMUf3RPwoy8wXVZT6WSytyL XX9suDqVqMp+895Jy7uyTlmTvLpOd/rVPzqjS2bJ96JdNeYHoM/46d13OuPX29gufiFMO9H5b +nl3seNTNJ2bRp91WCuJ1Ees7/zQ97p62S/i2vjbn9kMRhQuieQp1a1dmNNxfvS70+5xcrYCl D6Sv6bRxJObYKrEUZyQaajEXFScCAMS2uAxmAgAA X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-12.tower-21.messagelabs.com!1493920477!66744113!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.12; banners=-,-,- X-VirusChecked: Checked Received: (qmail 49010 invoked from network); 4 May 2017 17:54:38 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-12.tower-21.messagelabs.com with SMTP; 4 May 2017 17:54:38 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7DAE61509; Thu, 4 May 2017 10:54:37 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DEAE93F4FF; Thu, 4 May 2017 10:54:36 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Thu, 4 May 2017 18:54:24 +0100 Message-Id: <20170504175425.22759-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170504175425.22759-1-julien.grall@arm.com> References: <20170504175425.22759-1-julien.grall@arm.com> Cc: Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH 2/3] xen/arm: do_trap_hypervisor: Separate hypervisor and guest traps X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" The function do_trap_hypervisor is currently handling both trap coming from the hypervisor and the guest. This makes difficult to get specific behavior when a trap is coming from either the guest or the hypervisor. Split the function into two parts: - do_trap_guest_sync to handle guest traps - do_trap_hyp_sync to handle hypervisor traps On AArch32, the Hyp Trap Exception provides the standard mechanism for trapping Guest OS functions to the hypervisor (see B1.14.1 in ARM DDI 0406C.c). It cannot be generated when generated when the processor is in Hyp Mode, instead other exception will be used. So it is fine to replace the call to do_trap_hypervisor by do_trap_guest_sync. For AArch64, there are two distincts exception depending whether the exception was taken from the current level (hypervisor) or lower level (guest). Signed-off-by: Julien Grall --- xen/arch/arm/arm32/entry.S | 4 ++-- xen/arch/arm/arm64/entry.S | 6 +++--- xen/arch/arm/traps.c | 17 ++++++++++++++++- 3 files changed, 21 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/arm32/entry.S b/xen/arch/arm/arm32/entry.S index 05733089f7..120922e64e 100644 --- a/xen/arch/arm/arm32/entry.S +++ b/xen/arch/arm/arm32/entry.S @@ -152,14 +152,14 @@ GLOBAL(hyp_traps_vector) b trap_hypervisor_call /* 0x08 - Hypervisor Call */ b trap_prefetch_abort /* 0x0c - Prefetch Abort */ b trap_data_abort /* 0x10 - Data Abort */ - b trap_hypervisor /* 0x14 - Hypervisor */ + b trap_guest_sync /* 0x14 - Hypervisor */ b trap_irq /* 0x18 - IRQ */ b trap_fiq /* 0x1c - FIQ */ DEFINE_TRAP_ENTRY(undefined_instruction) DEFINE_TRAP_ENTRY(hypervisor_call) DEFINE_TRAP_ENTRY(prefetch_abort) -DEFINE_TRAP_ENTRY(hypervisor) +DEFINE_TRAP_ENTRY(guest_sync) DEFINE_TRAP_ENTRY_NOIRQ(irq) DEFINE_TRAP_ENTRY_NOIRQ(fiq) DEFINE_TRAP_ENTRY_NOABORT(data_abort) diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S index 137e67c674..06afc8a4e4 100644 --- a/xen/arch/arm/arm64/entry.S +++ b/xen/arch/arm/arm64/entry.S @@ -189,7 +189,7 @@ hyp_sync: entry hyp=1 msr daifclr, #6 mov x0, sp - bl do_trap_hypervisor + bl do_trap_hyp_sync exit hyp=1 hyp_irq: @@ -211,7 +211,7 @@ guest_sync: SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT) msr daifclr, #6 mov x0, sp - bl do_trap_hypervisor + bl do_trap_guest_sync 1: exit hyp=0, compat=0 @@ -254,7 +254,7 @@ guest_sync_compat: SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT) msr daifclr, #6 mov x0, sp - bl do_trap_hypervisor + bl do_trap_guest_sync 1: exit hyp=0, compat=1 diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 6010c96c54..c8ce62ff96 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2805,7 +2805,7 @@ static void enter_hypervisor_head(struct cpu_user_regs *regs) } } -asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs) +asmlinkage void do_trap_guest_sync(struct cpu_user_regs *regs) { const union hsr hsr = { .bits = regs->hsr }; @@ -2925,6 +2925,21 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs) do_trap_data_abort_guest(regs, hsr); break; + default: + printk("Guest Trap. HSR=0x%x EC=0x%x IL=%x Syndrome=0x%"PRIx32"\n", + hsr.bits, hsr.ec, hsr.len, hsr.iss); + do_unexpected_trap("Guest", regs); + } +} + +asmlinkage void do_trap_hyp_sync(struct cpu_user_regs *regs) +{ + const union hsr hsr = { .bits = regs->hsr }; + + enter_hypervisor_head(regs); + + switch ( hsr.ec ) + { #ifdef CONFIG_ARM_64 case HSR_EC_BRK: do_trap_brk(regs, hsr);