From patchwork Thu Mar 15 20:30:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 131842 Delivered-To: patch@linaro.org Received: by 10.46.84.17 with SMTP id i17csp1579167ljb; Thu, 15 Mar 2018 13:33:19 -0700 (PDT) X-Google-Smtp-Source: AG47ELvtXO624q6ZEfbYdh6z/L65/M2zE+jBa1FUkD+CfKOA86hWBVTKoVt4vIqiLqjit+odkXvt X-Received: by 10.107.213.5 with SMTP id m5mr11101585iog.62.1521145999174; Thu, 15 Mar 2018 13:33:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521145999; cv=none; d=google.com; s=arc-20160816; b=AwjAC1aEoFtLE3tHDRMkWN9AHmIBgo3xegXLtsCCHfbna5nY2AXJdOAMcZOOGY5H9K oZmG+lnbPaVj/xAC8i94vxjD46OsmdJlp/wAD+HIg9jBRJebflcWvdYynR/YoNN32jDK yEpgUAi5MPmYP5o0126iOQGZAhPA8LBzsVTdZyC5EKRR6Hg60/whuMu+e+xW42u5/YM8 ihdFoJNzSyHZ6JN3LctUSdioY/x+4J9itVTNiwJv8CE5AK4jJ3ijh70weC9q+dqC+w9g 3Ru46GtBAWfNRpV04LBcbFtKxVgWHbufCY+fWsz5flT038pZhvdS64bRKfzW337JO5Ov 3edQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=T1AwvOgccNkxhBOL9FZyVxmniNGDuGTG99nUdQOS1kY=; b=HUkBWBbwDzmpK7Sf7hxn2wFMYFwI1v7jnbGX4uXF/ZKD0QclydHqSBqBpJvAP4q1r8 oKQ30K3sD2MVDpJdBztInLPSnYxXiEkBRfbSuu5u49+s6lxjmEnpLToDNeWSQGaR/xW7 BWVtwKXWnL+AX3TaaXLyFrMXRVMMdurdlHHgUJbjC7ZC2ldLnxF/jYk6K1aklZOpQ6XW qxhffJUn8aZ4KSBZvFJC9PX5GgkMWkw/qcLMgGMlMTPEjficEF6H+JevU9DDnwRz3lWl PjhduNb7VcmJj5xVz/qsQ+9cXKIkfUTEJVO03wnF7cSVYlyxwW2U7LLOm3qfgQw9Q3JE 7uCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=iTnt9gKV; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id y37si3592952ioi.277.2018.03.15.13.33.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Mar 2018 13:33:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=iTnt9gKV; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ewZXQ-0004LX-UP; Thu, 15 Mar 2018 20:31:48 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ewZXP-0004GL-6T for xen-devel@lists.xenproject.org; Thu, 15 Mar 2018 20:31:47 +0000 X-Inumbo-ID: dd1a9610-288f-11e8-9728-bc764e045a96 Received: from mail-wm0-x241.google.com (unknown [2a00:1450:400c:c09::241]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id dd1a9610-288f-11e8-9728-bc764e045a96; Thu, 15 Mar 2018 21:31:39 +0100 (CET) Received: by mail-wm0-x241.google.com with SMTP id q83so12890810wme.5 for ; Thu, 15 Mar 2018 13:31:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=55lceIbW2CqS0eegkuxkihC4/F4bLbp8r55N+gKjYFA=; b=iTnt9gKVK1x24KF8dAge3YLvgLccHmIeIlZebMhNEa0W5scyhPa5D8Bw7DivfFdV8G FqFTJbOBV4mlNVAGpztbwISv9XUwUBl0sji8/Hu1ujXitzBOrr0Bv2WWW93iBB83QF7h irDUuuIXaCuSNEwFKIBdKti0xAxiiHaue3Nck= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=55lceIbW2CqS0eegkuxkihC4/F4bLbp8r55N+gKjYFA=; b=Wm2WCxm7k1fhKZoNPBFD2AK7x1aE+ffEanSW60TCsUOhhuay/YBci+raERKl3a7W3S hca+jV21PGlQnIRGHafK9U0sdxTbEN+qGYUCxFRsugI7o7NBxJ/nUE3O7kvoEeue1658 UBFCIpI3DRB3qNEXPpUPo0GwoQCwM3866mqyuOKHacfOoiHfOKf+FSBdZNsm2hUuUtmw K/Gy52dOFaMtW1vnna/Db4yL7myZNbQVuuWGRIgb0s2G5WWPHWTcdo/lSMrnCC8Y7Dd+ 9YvO0I53cKnvtx7NkAm2r2Wn4/b2tQGt6QlUwMUzBWb7jwWwg+6yx+3Hx8yMEGTUuR12 Fbnw== X-Gm-Message-State: AElRT7Gkdq5gN5OBeMxBJXElqNPjt7Wf8IqAVC7gzvxMg0BDTVBncPKv 466PdKWQWaMVlv3qqmsm3JnSbA== X-Received: by 10.28.153.133 with SMTP id b127mr5440591wme.105.1521145904060; Thu, 15 Mar 2018 13:31:44 -0700 (PDT) Received: from e104803-lin.lan (mail.andrep.de. [217.160.17.100]) by smtp.gmail.com with ESMTPSA id w125sm3217102wmw.20.2018.03.15.13.31.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Mar 2018 13:31:43 -0700 (PDT) From: Andre Przywara To: Stefano Stabellini , Julien Grall Date: Thu, 15 Mar 2018 20:30:39 +0000 Message-Id: <20180315203050.19791-35-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180315203050.19791-1-andre.przywara@linaro.org> References: <20180315203050.19791-1-andre.przywara@linaro.org> Cc: xen-devel@lists.xenproject.org Subject: [Xen-devel] [PATCH v2 34/45] ARM: new VGIC: Add event channel IRQ handling X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The Xen core/arch code relies on two abstracted functions to inject an event channel IRQ and to query its pending state. Implement those to query the state of the new VGIC implementation. Signed-off-by: Andre Przywara Acked-by: Julien Grall --- Changelog v1 ... v2: - Add Acked-by: xen/arch/arm/vgic/vgic.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c index 7ff680443c..277cf4a03e 100644 --- a/xen/arch/arm/vgic/vgic.c +++ b/xen/arch/arm/vgic/vgic.c @@ -689,6 +689,29 @@ void vgic_kick_vcpus(struct domain *d) } } +void arch_evtchn_inject(struct vcpu *v) +{ + vgic_inject_irq(v->domain, v, v->domain->arch.evtchn_irq, true); +} + +bool vgic_evtchn_irq_pending(struct vcpu *v) +{ + struct vgic_irq *irq; + unsigned long flags; + bool pending; + + /* Does not work for LPIs. */ + ASSERT(!is_lpi(v->domain->arch.evtchn_irq)); + + irq = vgic_get_irq(v->domain, v, v->domain->arch.evtchn_irq); + spin_lock_irqsave(&irq->irq_lock, flags); + pending = irq_is_pending(irq); + spin_unlock_irqrestore(&irq->irq_lock, flags); + vgic_put_irq(v->domain, irq); + + return pending; +} + struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v, unsigned int virq) {