From patchwork Wed Nov 28 16:49:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152317 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321794ljp; Wed, 28 Nov 2018 08:52:48 -0800 (PST) X-Google-Smtp-Source: AFSGD/WNcbTvSSgkF9RZiXa3BLlsWJKC7yJVRe3dhha8OTUhv7jSkkA2t9Z2rpZ4tbbr1WRXMgYz X-Received: by 2002:a25:3813:: with SMTP id f19-v6mr37732604yba.237.1543423968479; Wed, 28 Nov 2018 08:52:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423968; cv=none; d=google.com; s=arc-20160816; b=XIrowzjLyhGr9VsISyW0TUTEGbcHD9PZ4XxKnh48u6ECj7Rhh/IUsCq0eBwA1I6iuT iHEnWsgjHugj28TD/XuPGQv4ES83VfAmsRhlybVNzeV/Mm/GFN0bY0keicMg/0+uaj9E GZEQld9qgzgXG6dz8Dt1Xl23lVpPQ+y/sYcKbr9dXlsaYQjbz6DZPR5LCK4jiMGs17Ns A2LBhGnOEM4/nqunMzzm9zAZAbtipR8dIrZo9dqt3aX/EvGaAvXLWH/Ara08GQEwYtze eOJikB4irTki56oCgPT9gX03odLms8Gd0LPlZxFsZiOXYWMDCVPZmualvf7HnI6wtAZO qssA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=eW3z8x/h0oTXIeGqZAo9R89R5fV7F+AjGG1ya4znETE=; b=WC6se79YvkMske9CMPpfiHC92fIoy8PTJyKTJlcIyV0OpCv/ZCdjc+VHf7t+Ytw7QY VTccpwNt+Fi4LLTDO3WqPaBymkWBhR1XXyVOHSia/1ExY5jcrXc/dZVVb3aKiGSrIEOy RbM0oeSUf++wgdGZAU91j3fibb6FxJnRuhKVAf0nvV42dvNsbFZuO2AHlvd517rnIiPt sGdtdNSZlMD4iWZrRXzqE3gakTj/ouZ9nAJmAXcbIVvgWpI8KyMN3C9jHGBfukf1LgPD F2b4o32tbp7Ng5Z9pwYIelxKVh3FRbuHqtP4DL/zqO+D+Hn9BhfccgAE6YLx9LzCb+lk rHGQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id a186si5543367ywe.43.2018.11.28.08.52.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32C-0000t4-B9; Wed, 28 Nov 2018 16:49:56 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32A-0000sE-Po for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:54 +0000 X-Inumbo-ID: a0ec9607-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a0ec9607-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:53 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 31839382E; Wed, 28 Nov 2018 08:49:53 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 44C573F575; Wed, 28 Nov 2018 08:49:52 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:36 +0000 Message-Id: <20181128164939.8329-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 5/8] xen/arm: p2m: Only use isb() when it is necessary X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The EL1 translation regime is out-of-context when running at EL2. This means the processor cannot speculate memory accesses using the registers associated to that regime. An isb() is only need if Xen is going to use the translation regime before returning to the guest (exception returns will synchronized the context). Remove unecessary isb() and document the ones left. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov --- xen/arch/arm/p2m.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index e8bacab9d2..844833c4c3 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -112,22 +112,28 @@ void p2m_restore_state(struct vcpu *n) return; WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); - isb(); - WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1); - isb(); - WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2); - isb(); last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()]; /* + * While we are restoring an out-of-context translation regime + * we still need to ensure: + * - VTTBR_EL2 is synchronized before flushing the TLBs + * - All registers for EL1 are synchronized before executing an AT + * instructions targeting S1/S2. + */ + isb(); + + /* * Flush local TLB for the domain to prevent wrong TLB translation * when running multiple vCPU of the same domain on a single pCPU. */ if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id ) + { flush_tlb_local(); + } *last_vcpu_ran = n->vcpu_id; } @@ -153,6 +159,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) { local_irq_save(flags); WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */ isb(); } @@ -161,6 +168,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) if ( ovttbr != READ_SYSREG64(VTTBR_EL2) ) { WRITE_SYSREG64(ovttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is back in place before continuing. */ isb(); local_irq_restore(flags); } @@ -1496,7 +1504,6 @@ static uint32_t __read_mostly vtcr; static void setup_virt_paging_one(void *data) { WRITE_SYSREG32(vtcr, VTCR_EL2); - isb(); } void __init setup_virt_paging(void)