From patchwork Tue May 14 12:24:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 164180 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp2555026ili; Tue, 14 May 2019 05:26:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqzAQ6RGt5hcDXQsSoVHZW5KIkSU/PANkj7ETmRnY5pS/nQUxXDaj/htBttFGRAaTAYxgSyl X-Received: by 2002:a6b:b3c5:: with SMTP id c188mr21394800iof.203.1557836769694; Tue, 14 May 2019 05:26:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557836769; cv=none; d=google.com; s=arc-20160816; b=QpgfOcKQrXCVMQKQFn7OXBZTlzesRi13poIgy0RUJzorM9FApAmZd7UHpKEherkfY3 HZ8bAIG3gCYmQwiccxLzTz75SCQSwRBR9OL1Bwvk7QkpZ41AGYZ39kJ9w4HOKEW/FIPB effYNV4qqF7sixgREJJpnmnSMJ641s9yEaldTOLjE+HNRBoZPShR/mHZKHBBKIbis8pk frbbCUSe+9p7Bf2aKnKWfRRpKB72x11aY0SexbqewNnqjQWRGfNYay1SA2qyV+fKdOu2 ynEbT3nYWLV5XWTkEaNw3JonB8qL/bNIsDvPizms6RY/dZB1t+hrWTennZC2F+g6Dm/p PVKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=SVvnDDvkXOt9PhNeVd6Neu09c6WdnWwLFDcQjDC5oBw=; b=T1ko5CPayy9L4VoVT00ewjzF1lmSt58kpmv/X3TlYtLANQQDN91mG4HtgxBGXfMGRY mdfIrvMssdXDCZFl9LYuCNh8dP2omDKU50QrZQAHgZLcxKMwesBtGezdYPMsFbc5V3JO 0ZdBz85vXlBiBSpkFxVN6jez1KR4YYf37k546xaUK7Blv4VFhQMELAyjsDXRGEvb3DsN oC8eyriAcqEGLJGAv+pEEqm0JiORSHgKV3SkLvy5OgyGSLSiN4yhaeZgmhdBmHciqBl1 AgDK+uivC3+atSn8hyJls6jN2BJk39zr4RGRlmxQBooBBjwDOb/6rWFQWQKVwKUmeoxr E9qw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id t9si9558655iod.160.2019.05.14.05.26.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 05:26:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hQWUh-0002gu-0x; Tue, 14 May 2019 12:25:19 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hQWUf-0002ex-M9 for xen-devel@lists.xenproject.org; Tue, 14 May 2019 12:25:17 +0000 X-Inumbo-ID: 54511295-7643-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 54511295-7643-11e9-8980-bc764e045a96; Tue, 14 May 2019 12:25:16 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 02C5A15AB; Tue, 14 May 2019 05:25:16 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C39B33F71E; Tue, 14 May 2019 05:25:14 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 14 May 2019 13:24:46 +0100 Message-Id: <20190514122456.28559-10-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190514122456.28559-1-julien.grall@arm.com> References: <20190514122456.28559-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH MM-PART2 RESEND v2 09/19] xen/arm64: head: Correctly report the HW CPU ID X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr_Tyshchenko@epam.com, Julien Grall , Stefano Stabellini , Andrii Anisov MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" There are no reason to consider the HW CPU ID will be 0 when the processor is part of a uniprocessor system. At best, this will result to conflicting output as the rest of Xen use the value directly read from MPIDR_EL1. So remove the zeroing and logic to check if the CPU is part of a uniprocessor system. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- Changes in v2: - Add Andrii's reviewed-by --- xen/arch/arm/arm64/head.S | 6 ------ 1 file changed, 6 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index b957eb90fb..08094a273e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -277,15 +277,9 @@ GLOBAL(init_secondary) mov x26, #1 /* X26 := skip_zero_bss */ common_start: - mov x24, #0 /* x24 := CPU ID. Initialy zero until we - * find that multiprocessor extensions are - * present and the system is SMP */ mrs x0, mpidr_el1 - tbnz x0, _MPIDR_UP, 1f /* Uniprocessor system? */ - ldr x13, =(~MPIDR_HWID_MASK) bic x24, x0, x13 /* Mask out flags to get CPU ID */ -1: /* Non-boot CPUs wait here until __cpu_up is ready for them */ cbz x22, 1f