| Message ID | 20190610193215.23704-13-julien.grall@arm.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | xen/arm64: Rework head.S to make it more compliant with the Arm Arm | expand |
On Mon, 10 Jun 2019, Julien Grall wrote: > The assembly switch to the runtime PT is only necessary for the > secondary CPUs. So move the code in the secondary CPUs path. > > While this is definitely not compliant with the Arm Arm as we are > switching between two differents set of page-tables without turning off > the MMU. Turning off the MMU is impossible here as the ID map may clash > with other mappings in the runtime page-tables. This will require more > rework to avoid the problem. So for now add a TODO in the code. > > Signed-off-by: Julien Grall <julien.grall@arm.com> Acked-by: Stefano Stabellini <sstabellini@kernel.org> > --- > xen/arch/arm/arm64/head.S | 33 +++++++++++++++++---------------- > 1 file changed, 17 insertions(+), 16 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index d673f7c0d8..6be4af7579 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -344,6 +344,23 @@ GLOBAL(init_secondary) > br x0 > secondary_switched: > bl setup_fixmap > + > + /* > + * Non-boot CPUs need to move on to the proper pagetables, which were > + * setup in init_secondary_pagetables. > + * > + * XXX: This is not compliant with the Arm Arm. > + */ > + ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ > + ldr x4, [x4] /* Actual value */ > + dsb sy > + msr TTBR0_EL2, x4 > + dsb sy > + isb > + tlbi alle2 > + dsb sy /* Ensure completion of TLB flush */ > + isb > + > b launch > ENDPROC(init_secondary) > > @@ -657,22 +674,6 @@ ENDPROC(setup_fixmap) > launch: > PRINT("- Ready -\r\n") > > - /* The boot CPU should go straight into C now */ > - cbz x22, launch > - > - /* Non-boot CPUs need to move on to the proper pagetables, which were > - * setup in init_secondary_pagetables. */ > - > - ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ > - ldr x4, [x4] /* Actual value */ > - dsb sy > - msr TTBR0_EL2, x4 > - dsb sy > - isb > - tlbi alle2 > - dsb sy /* Ensure completion of TLB flush */ > - isb > - > ldr x0, =init_data > add x0, x0, #INITINFO_stack /* Find the boot-time stack */ > ldr x0, [x0] > -- > 2.11.0 >
diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index d673f7c0d8..6be4af7579 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -344,6 +344,23 @@ GLOBAL(init_secondary) br x0 secondary_switched: bl setup_fixmap + + /* + * Non-boot CPUs need to move on to the proper pagetables, which were + * setup in init_secondary_pagetables. + * + * XXX: This is not compliant with the Arm Arm. + */ + ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ + ldr x4, [x4] /* Actual value */ + dsb sy + msr TTBR0_EL2, x4 + dsb sy + isb + tlbi alle2 + dsb sy /* Ensure completion of TLB flush */ + isb + b launch ENDPROC(init_secondary) @@ -657,22 +674,6 @@ ENDPROC(setup_fixmap) launch: PRINT("- Ready -\r\n") - /* The boot CPU should go straight into C now */ - cbz x22, launch - - /* Non-boot CPUs need to move on to the proper pagetables, which were - * setup in init_secondary_pagetables. */ - - ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ - ldr x4, [x4] /* Actual value */ - dsb sy - msr TTBR0_EL2, x4 - dsb sy - isb - tlbi alle2 - dsb sy /* Ensure completion of TLB flush */ - isb - ldr x0, =init_data add x0, x0, #INITINFO_stack /* Find the boot-time stack */ ldr x0, [x0]
The assembly switch to the runtime PT is only necessary for the secondary CPUs. So move the code in the secondary CPUs path. While this is definitely not compliant with the Arm Arm as we are switching between two differents set of page-tables without turning off the MMU. Turning off the MMU is impossible here as the ID map may clash with other mappings in the runtime page-tables. This will require more rework to avoid the problem. So for now add a TODO in the code. Signed-off-by: Julien Grall <julien.grall@arm.com> --- xen/arch/arm/arm64/head.S | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-)