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[192.237.175.120]) by mx.google.com with ESMTPS id l17si2499088otk.295.2019.09.18.06.54.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 18 Sep 2019 06:54:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iAaOJ-0003px-DF; Wed, 18 Sep 2019 13:53:07 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iAaOH-0003pd-TH for xen-devel@lists.xenproject.org; Wed, 18 Sep 2019 13:53:05 +0000 X-Inumbo-ID: a3107c9e-da1b-11e9-9636-12813bfff9fa Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id a3107c9e-da1b-11e9-9636-12813bfff9fa; Wed, 18 Sep 2019 13:53:04 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 611831000; Wed, 18 Sep 2019 06:53:04 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 784983F67D; Wed, 18 Sep 2019 06:53:03 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 18 Sep 2019 14:52:56 +0100 Message-Id: <20190918135256.7287-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Subject: [Xen-devel] [PATCH for-4.13] xen/arm: livepatch: Prevent CPUs to fetch stale instructions after livepatching X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Ross Lagerwall , Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Konrad Rzeszutek Wilk MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" During livepatch, a single CPU will take care of applying the patch and all the others will wait for the action to complete. They will then once execute arch_livepatch_post_action() to flush the pipeline. Per B2.2.5 "Concurrent modification and execution of instructions" in DDI 0487E.a, flushing the instruction cache is not enough to ensure new instructions are seen. All the PEs should also do an isb() to synchronize the fetched instruction stream. Signed-off-by: Julien Grall Acked-by: Ross Lagerwall Reviewed-by: Volodymyr Babchuk --- xen/arch/arm/livepatch.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/livepatch.c b/xen/arch/arm/livepatch.c index 279d52cc6c..00c5e2bc45 100644 --- a/xen/arch/arm/livepatch.c +++ b/xen/arch/arm/livepatch.c @@ -88,7 +88,8 @@ void arch_livepatch_revert(const struct livepatch_func *func) void arch_livepatch_post_action(void) { - /* arch_livepatch_revive has nuked the instruction cache. */ + /* Discard any stale instructions that may have been fetched. */ + isb(); } void arch_livepatch_mask(void)