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Mon, 09 Oct 2017 12:58:44 -0700 (PDT) Received: from localhost.localdomain ([2601:646:8882:b8c::3e99]) by smtp.gmail.com with ESMTPSA id 9sm15827964pgg.42.2017.10.09.12.58.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 09 Oct 2017 12:58:43 -0700 (PDT) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 9 Oct 2017 12:58:36 -0700 Message-Id: <20171009195836.17085-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.14.2 Subject: [OE-core] [PATCH V2 6/9] gcc: Backport fix for a segfault on riscv X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org seen during kernel compile Signed-off-by: Khem Raj --- - Changes in V2: Add SOB meta/recipes-devtools/gcc/gcc-7.2.inc | 1 + ...le-non-legitimate-address-in-riscv_legiti.patch | 51 ++++++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch -- 2.14.2 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/recipes-devtools/gcc/gcc-7.2.inc b/meta/recipes-devtools/gcc/gcc-7.2.inc index 796e6b1eef..5883bc61a6 100644 --- a/meta/recipes-devtools/gcc/gcc-7.2.inc +++ b/meta/recipes-devtools/gcc/gcc-7.2.inc @@ -74,6 +74,7 @@ SRC_URI = "\ file://0047-sync-gcc-stddef.h-with-musl.patch \ file://0048-gcc-Enable-static-PIE.patch \ file://fix-segmentation-fault-precompiled-hdr.patch \ + file://0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch \ ${BACKPORTS} \ " BACKPORTS = "\ diff --git a/meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch b/meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch new file mode 100644 index 0000000000..5a14d04b6f --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch @@ -0,0 +1,51 @@ +From 16210e6270e200cd4892a90ecef608906be3a130 Mon Sep 17 00:00:00 2001 +From: Kito Cheng +Date: Thu, 4 May 2017 02:11:13 +0800 +Subject: [PATCH] RISC-V: Handle non-legitimate address in + riscv_legitimize_move + +GCC may generate non-legitimate address due to we allow some +load/store with non-legitimate address in pic.md. + + 2017-05-12 Kito Cheng + + * config/riscv/riscv.c (riscv_legitimize_move): Handle + non-legitimate address. +--- +Upstream-Status: Backport +Signed-off-by: Khem Raj + + gcc/ChangeLog | 5 +++++ + gcc/config/riscv/riscv.c | 16 ++++++++++++++++ + 2 files changed, 21 insertions(+) + +diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c +index f7fec4bfcf8..d519be1659a 100644 +--- a/gcc/config/riscv/riscv.c ++++ b/gcc/config/riscv/riscv.c +@@ -1385,6 +1385,22 @@ riscv_legitimize_move (enum machine_mode mode, rtx dest, rtx src) + return true; + } + ++ /* RISC-V GCC may generate non-legitimate address due to we provide some ++ pattern for optimize access PIC local symbol and it's make GCC generate ++ unrecognizable instruction during optmizing. */ ++ ++ if (MEM_P (dest) && !riscv_legitimate_address_p (mode, XEXP (dest, 0), ++ reload_completed)) ++ { ++ XEXP (dest, 0) = riscv_force_address (XEXP (dest, 0), mode); ++ } ++ ++ if (MEM_P (src) && !riscv_legitimate_address_p (mode, XEXP (src, 0), ++ reload_completed)) ++ { ++ XEXP (src, 0) = riscv_force_address (XEXP (src, 0), mode); ++ } ++ + return false; + } + +-- +2.14.2 +