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[50.57.142.19]) by mx.google.com with ESMTPS id 130si7704368qhg.115.2015.05.17.13.07.43 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 17 May 2015 13:07:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yu4py-0004M7-QR; Sun, 17 May 2015 20:07:02 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yu4px-0004J3-GK for xen-devel@lists.xen.org; Sun, 17 May 2015 20:07:01 +0000 Received: from [85.158.139.211] by server-17.bemta-5.messagelabs.com id 88/24-05057-4E4F8555; Sun, 17 May 2015 20:07:00 +0000 X-Env-Sender: parth.dixit@linaro.org X-Msg-Ref: server-4.tower-206.messagelabs.com!1431893218!11154692!1 X-Originating-IP: [209.85.192.173] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.13.15; banners=-,-,- X-VirusChecked: Checked Received: (qmail 5099 invoked from network); 17 May 2015 20:06:59 -0000 Received: from mail-pd0-f173.google.com (HELO mail-pd0-f173.google.com) (209.85.192.173) by server-4.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 17 May 2015 20:06:59 -0000 Received: by pdbqa5 with SMTP id qa5so117406752pdb.0 for ; Sun, 17 May 2015 13:06:58 -0700 (PDT) X-Received: by 10.68.226.4 with SMTP id ro4mr38505311pbc.108.1431893218421; Sun, 17 May 2015 13:06:58 -0700 (PDT) Received: from localhost.localdomain ([117.247.24.139]) by mx.google.com with ESMTPSA id j9sm7838401pdm.53.2015.05.17.13.06.54 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 May 2015 13:06:57 -0700 (PDT) From: Parth Dixit To: xen-devel@lists.xen.org Date: Mon, 18 May 2015 01:34:06 +0530 Message-Id: <1431893048-5214-40-git-send-email-parth.dixit@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431893048-5214-1-git-send-email-parth.dixit@linaro.org> References: <1431893048-5214-1-git-send-email-parth.dixit@linaro.org> Cc: keir@xen.org, ian.campbell@citrix.com, andrew.cooper3@citrix.com, tim@xen.org, julien.grall@citrix.com, stefano.stabellini@citrix.com, jbeulich@suse.com, parth.dixit@linaro.org, christoffer.dall@linaro.org Subject: [Xen-devel] [PATCH v2 39/41] arm : acpi configure interrupts dynamically X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: parth.dixit@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Interrupt information is described in DSDT and is not available at the time of booting. Configure the interrupts dynamically when requested by Dom0 Signed-off-by: Parth Dixit --- xen/arch/arm/vgic.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 73a6f7e..f63deb4 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -285,6 +286,8 @@ void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n) } } +#define VGIC_ICFG_MASK(intr) ( 1 << ( ( 2 * ( intr % 16 ) ) + 1 ) ) + void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) { struct domain *d = v->domain; @@ -296,7 +299,22 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) struct vcpu *v_target; while ( (i = find_next_bit(&mask, 32, i)) < 32 ) { +#ifdef CONFIG_ACPI + struct vgic_irq_rank *vr = vgic_get_rank(v, n); + uint32_t tr; + irq = i + (32 * n); + if( ( !acpi_disabled ) && ( n != 0 ) && is_hardware_domain(d) ) + { + tr = vr->icfg[i >> 4] ; + + if( ( tr & VGIC_ICFG_MASK(i) ) ) + set_irq_type(irq, ACPI_IRQ_TYPE_EDGE_BOTH); + else + set_irq_type(irq, ACPI_IRQ_TYPE_LEVEL_MASK); + } +#else irq = i + (32 * n); +#endif v_target = d->arch.vgic.handler->get_target_vcpu(v, irq); p = irq_to_pending(v_target, irq); set_bit(GIC_IRQ_GUEST_ENABLED, &p->status);