From patchwork Wed Mar 16 07:19:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Green X-Patchwork-Id: 630 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:44:12 -0000 Delivered-To: patches@linaro.org Received: by 10.151.46.5 with SMTP id y5cs1280ybj; Wed, 16 Mar 2011 00:19:42 -0700 (PDT) Received: by 10.227.0.88 with SMTP id 24mr424251wba.123.1300259981288; Wed, 16 Mar 2011 00:19:41 -0700 (PDT) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id r15si1151338wec.102.2011.03.16.00.19.40 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 16 Mar 2011 00:19:41 -0700 (PDT) Received-SPF: pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.50 as permitted sender) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.50 as permitted sender) smtp.mail=andy.warmcat.com@googlemail.com; dkim=pass (test mode) header.i=@googlemail.com Received: by mail-ww0-f50.google.com with SMTP id 33so1741876wwc.31 for ; Wed, 16 Mar 2011 00:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:sender:from:subject:to:cc:date:message-id :in-reply-to:references:user-agent:mime-version:content-type :content-transfer-encoding; bh=rQPJOqOb+tntQVWtHKfcwYIHwJD8MRnML5Eppkmwtio=; b=moKbIVvl40Ip+eFAASSm2clnEJ7i59YtcJfd7GsLF8IL2+e7Bgqob8gl/8lQfICIAH vYERVwcG/9MGBNyqZ81ZB8wbRVFGhXSh4ct9ko+hcxg9tdtBgxcZvW4t4IgNyk4QKXt5 KpjTjTB/oohTJWp4y1tmcHYR8JwztBeYeqr0Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=sender:from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; b=vp82cN5YU3zXMlAkdnUaJy/lXbuKTVdaXALQQ68bM3uEsnLO+aTg+gpCP8KIORI+zn 9K2UWhdQYcy7YrIPSotlqcaiogxUZyW7qX5EHfgcKIcyHP1wbaTFr5b/PVHhQIguGx+l WMPxAKL0NahBNgsPL79o9BQ/rVy2AlUzZy/Kc= Received: by 10.227.139.89 with SMTP id d25mr446660wbu.58.1300259980516; Wed, 16 Mar 2011 00:19:40 -0700 (PDT) Received: from otae.warmcat.com (cpc1-nrte21-2-0-cust677.8-4.cable.virginmedia.com [81.111.78.166]) by mx.google.com with ESMTPS id a50sm364237wer.42.2011.03.16.00.19.39 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 16 Mar 2011 00:19:40 -0700 (PDT) Sender: Andy Green From: Andy Green Subject: [PATCH 3 11/18] I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32 To: linux-i2c@lists.infradead.org Cc: patches@linaro.org, Ben Dooks , Andy Green Date: Wed, 16 Mar 2011 07:19:38 +0000 Message-ID: <20110316071938.453.14420.stgit@otae.warmcat.com> In-Reply-To: <20110316071633.453.22228.stgit@otae.warmcat.com> References: <20110316071633.453.22228.stgit@otae.warmcat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 As part of removing cpu_...() from the OMAP I2C driver, we need to convert the CPU tests into functionality flags that are set by hwmod class in the same way the IP revision is. More flags are needed than will fit in the existing u8 flags member of omap_i2c_dev_attr. These flags can refer to options inside the IP block but they are most needed for information about cpu implementation specific options that are not part of the IP block itself. For example, how the CPU data bus is wired to the IP block databus differs between OMAP cpus and affects how you must shift the address in the IP block, but is not a feature of the IP block itself. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green --- arch/arm/plat-omap/include/plat/i2c.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index a1d3d06..fd75dad 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -47,7 +47,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, */ struct omap_i2c_dev_attr { u8 fifo_depth; - u8 flags; + u32 flags; }; void __init omap1_i2c_mux_pins(int bus_id);