From patchwork Fri Mar 4 17:08:45 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 366 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:41:58 -0000 Delivered-To: patches@linaro.org Received: by 10.224.60.68 with SMTP id o4cs21640qah; Fri, 4 Mar 2011 09:08:55 -0800 (PST) Received: by 10.227.7.18 with SMTP id b18mr784545wbb.103.1299258534420; Fri, 04 Mar 2011 09:08:54 -0800 (PST) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id g26si4569702wbe.4.2011.03.04.09.08.54 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 04 Mar 2011 09:08:54 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) smtp.mail=lee.jones@linaro.org Received: by wwb31 with SMTP id 31so3099071wwb.31 for ; Fri, 04 Mar 2011 09:08:54 -0800 (PST) Received: by 10.227.1.102 with SMTP id 38mr779202wbe.109.1299258533844; Fri, 04 Mar 2011 09:08:53 -0800 (PST) Received: from [192.168.0.2] (cpc2-aztw21-0-0-cust264.aztw.cable.virginmedia.com [77.100.97.9]) by mx.google.com with ESMTPS id o6sm1940585wbo.21.2011.03.04.09.08.52 (version=SSLv3 cipher=OTHER); Fri, 04 Mar 2011 09:08:53 -0800 (PST) Message-ID: <4D711C9D.6000502@linaro.org> Date: Fri, 04 Mar 2011 17:08:45 +0000 From: Lee Jones User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.14) Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8 MIME-Version: 1.0 To: patches@linaro.org Subject: [PATCH 2/3] plat-nomadik: make GPIO interrupts work with cpuidle ApSleep From: Rabin Vincent Enable wakeups by default for any GPIO interrupts and in the suspend/resume path narrow this down to only the the real wakeup interrupts. This approach is based on the assumption that cpuidle ApSleep will be entered more often than system suspend. Signed-off-by: Rabin Vincent Reviewed-by: Srinidhi Kasagar [Fixup for genirq changes to struct irq_data on 2.6.38] Signed-off-by: Linus Walleij --- arch/arm/plat-nomadik/gpio.c | 114 ++++++++++++++++++++++++---- arch/arm/plat-nomadik/include/plat/gpio.h | 3 + 2 files changed, 100 insertions(+), 17 deletions(-) diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index 5e6653f..ea31e5f 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c @@ -50,6 +50,10 @@ struct nmk_gpio_chip { /* Keep track of configured edges */ u32 edge_rising; u32 edge_falling; + u32 real_wake; + u32 rwimsc; + u32 fwimsc; + u32 slpm; }; static struct nmk_gpio_chip * @@ -537,8 +541,20 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, } } -static int nmk_gpio_irq_modify(struct irq_data *d, enum nmk_gpio_irq_type which, - bool enable) +static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, + int gpio, bool on) +{ +#ifdef CONFIG_ARCH_U8500 + if (cpu_is_u8500v2()) { + __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, + on ? NMK_GPIO_SLPM_WAKEUP_ENABLE + : NMK_GPIO_SLPM_WAKEUP_DISABLE); + } +#endif + __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on); +} + +static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable) { int gpio; struct nmk_gpio_chip *nmk_chip; @@ -551,45 +567,55 @@ static int nmk_gpio_irq_modify(struct irq_data *d, enum nmk_gpio_irq_type which, if (!nmk_chip) return -EINVAL; - spin_lock_irqsave(&nmk_chip->lock, flags); - __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable); - spin_unlock_irqrestore(&nmk_chip->lock, flags); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable); + + if (!(nmk_chip->real_wake & bitmask)) + __nmk_gpio_set_wake(nmk_chip, gpio, enable); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); return 0; } static void nmk_gpio_irq_mask(struct irq_data *d) { - nmk_gpio_irq_modify(d, NORMAL, false); + nmk_gpio_irq_maskunmask(d, false); } static void nmk_gpio_irq_unmask(struct irq_data *d) { - nmk_gpio_irq_modify(d, NORMAL, true); + nmk_gpio_irq_maskunmask(d, true); } static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) { + struct irq_desc *desc = irq_to_desc(d->irq); + bool enabled = !(desc->status & IRQ_DISABLED); struct nmk_gpio_chip *nmk_chip; unsigned long flags; + u32 bitmask; int gpio; gpio = NOMADIK_IRQ_TO_GPIO(d->irq); nmk_chip = irq_data_get_irq_chip_data(d); if (!nmk_chip) return -EINVAL; + bitmask = nmk_gpio_get_bitmask(gpio); spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); spin_lock(&nmk_chip->lock); -#ifdef CONFIG_ARCH_U8500 - if (cpu_is_u8500v2()) { - __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, - on ? NMK_GPIO_SLPM_WAKEUP_ENABLE - : NMK_GPIO_SLPM_WAKEUP_DISABLE); - } -#endif - __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on); + if (!enabled) + __nmk_gpio_set_wake(nmk_chip, gpio, on); + + if (on) + nmk_chip->real_wake |= bitmask; + else + nmk_chip->real_wake &= ~bitmask; spin_unlock(&nmk_chip->lock); spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); @@ -623,7 +649,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false); - if (wake) + if (enabled || wake) __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false); nmk_chip->edge_rising &= ~bitmask; @@ -637,7 +663,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true); - if (wake) + if (enabled || wake) __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true); spin_unlock_irqrestore(&nmk_chip->lock, flags); @@ -873,6 +899,60 @@ static struct gpio_chip nmk_gpio_template = { .can_sleep = 0, }; +/* + * Called from the suspend/resume path to only keep the real wakeup interrupts + * (those that have had set_irq_wake() called on them) as wakeup interrupts, + * and not the rest of the interrupts which we needed to have as wakeups for + * cpuidle. + * + * PM ops are not used since this needs to be done at the end, after all the + * other drivers are done with their suspend callbacks. + */ +void nmk_gpio_wakeups_suspend(void) +{ + int i; + + for (i = 0; i < NUM_BANKS; i++) { + struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; + + if (!chip) + break; + + chip->rwimsc = readl(chip->addr + NMK_GPIO_RWIMSC); + chip->fwimsc = readl(chip->addr + NMK_GPIO_FWIMSC); + + writel(chip->rwimsc & chip->real_wake, + chip->addr + NMK_GPIO_RWIMSC); + writel(chip->fwimsc & chip->real_wake, + chip->addr + NMK_GPIO_FWIMSC); + + if (cpu_is_u8500v2()) { + chip->slpm = readl(chip->addr + NMK_GPIO_SLPC); + + /* 0 -> wakeup enable */ + writel(~chip->real_wake, chip->addr + NMK_GPIO_SLPC); + } + } +} + +void nmk_gpio_wakeups_resume(void) +{ + int i; + + for (i = 0; i < NUM_BANKS; i++) { + struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; + + if (!chip) + break; + + writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC); + writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC); + + if (cpu_is_u8500v2()) + writel(chip->slpm, chip->addr + NMK_GPIO_SLPC); + } +} + static int __devinit nmk_gpio_probe(struct platform_device *dev) { struct nmk_gpio_platform_data *pdata = dev->dev.platform_data; diff --git a/arch/arm/plat-nomadik/include/plat/gpio.h b/arch/arm/plat-nomadik/include/plat/gpio.h index e3a4837..1b9f6f0 100644 --- a/arch/arm/plat-nomadik/include/plat/gpio.h +++ b/arch/arm/plat-nomadik/include/plat/gpio.h @@ -75,6 +75,9 @@ extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull); extern int nmk_gpio_set_mode(int gpio, int gpio_mode); extern int nmk_gpio_get_mode(int gpio); +extern void nmk_gpio_wakeups_suspend(void); +extern void nmk_gpio_wakeups_resume(void); + /* * Platform data to register a block: only the initial gpio/irq number. */