| Message ID | 20181225205529.10874-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | tcg queued patches | expand |
Patchew URL: https://patchew.org/QEMU/20181225205529.10874-1-richard.henderson@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20181225205529.10874-1-richard.henderson@linaro.org
Subject: [Qemu-devel] [PULL 00/42] tcg queued patches
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
0f7294b tcg: Improve call argument loading
6aa2ac3 tcg: Record register preferences during liveness
982118d tcg: Add TCG_OPF_BB_EXIT
0dc2410 tcg: Split out more subroutines from liveness_pass_1
8c8f69a tcg: Rename and adjust liveness_pass_1 helpers
07ab04a tcg: Reindent parts of liveness_pass_1
44c70fc tcg: Dump register preference info with liveness
97ca81f tcg: Improve register allocation for matching constraints
b89850f tcg: Add output_pref to TCGOp
fc00884 tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi
bec5e0c tcg: Add preferred_reg argument to temp_sync
3981b34 tcg: Add preferred_reg argument to temp_load
61a9975 tcg: Add preferred_reg argument to tcg_reg_alloc
7091b2d tcg: Add reachable_code_pass
8797c51 tcg: Reference count labels
b02acc5 tcg: Add TCG_CALL_NO_RETURN
c5ac9a3 tcg: Renumber TCG_CALL_* flags
12f1b06 linux-user: Add safe_syscall for riscv64 host
1bd00fc disas/microblaze: Remove unused REG_SP macro
d27ea8d configure: Add support for building RISC-V host
33c4186 disas: Add RISC-V support
88b5d5d tcg: Add RISC-V cpu signal handler
3eb2e05 tcg/riscv: Add the target init code
2880f15 tcg/riscv: Add the prologue generation and register the JIT
b6cf6f4 tcg/riscv: Add the out op decoder
c20edc5 tcg/riscv: Add direct load and store instructions
671a9f9 tcg/riscv: Add slowpath load and store instructions
68b9b41 tcg/riscv: Add branch and jump instructions
65276e1 tcg/riscv: Add the add2 and sub2 instructions
584bb6e tcg/riscv: Add the out load and store instructions
0b72e86 tcg/riscv: Add the extract instructions
23558fd tcg/riscv: Add the mov and movi instruction
30ffb28 tcg/riscv: Add the relocation functions
5bfaa0b tcg/riscv: Add the instruction emitters
0beb56b tcg/riscv: Add the immediate encoders
5ce042f tcg/riscv: Add support for the constraints
0b60272 tcg/riscv: Add the tcg target registers
f2633ad tcg/riscv: Add the tcg-target.h file
1a6fb6f exec: Add RISC-V GCC poison macro
5edbfa3 linux-user: Add host dependency for RISC-V 64-bit
147bba0 linux-user: Add host dependency for RISC-V 32-bit
6971b73 elf.h: Add the RISCV ELF magic numbers
=== OUTPUT BEGIN ===
Checking PATCH 1/42: elf.h: Add the RISCV ELF magic numbers...
Checking PATCH 2/42: linux-user: Add host dependency for RISC-V 32-bit...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#26:
new file mode 100644
total: 0 errors, 1 warnings, 18 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 3/42: linux-user: Add host dependency for RISC-V 64-bit...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#26:
new file mode 100644
total: 0 errors, 1 warnings, 18 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 4/42: exec: Add RISC-V GCC poison macro...
Checking PATCH 5/42: tcg/riscv: Add the tcg-target.h file...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
WARNING: architecture specific defines should be avoided
#74: FILE: tcg/riscv/tcg-target.h:28:
+#if __riscv_xlen == 32
total: 0 errors, 2 warnings, 199 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 6/42: tcg/riscv: Add the tcg target registers...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#14:
new file mode 100644
total: 0 errors, 1 warnings, 118 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 7/42: tcg/riscv: Add support for the constraints...
Checking PATCH 8/42: tcg/riscv: Add the immediate encoders...
Checking PATCH 9/42: tcg/riscv: Add the instruction emitters...
Checking PATCH 10/42: tcg/riscv: Add the relocation functions...
Checking PATCH 11/42: tcg/riscv: Add the mov and movi instruction...
Checking PATCH 12/42: tcg/riscv: Add the extract instructions...
Checking PATCH 13/42: tcg/riscv: Add the out load and store instructions...
Checking PATCH 14/42: tcg/riscv: Add the add2 and sub2 instructions...
WARNING: Block comments use a leading /* on a separate line
#32: FILE: tcg/riscv/tcg-target.inc.c:710:
+ /* If we have a negative constant such that negating it would
WARNING: Block comments use * on subsequent lines
#33: FILE: tcg/riscv/tcg-target.inc.c:711:
+ /* If we have a negative constant such that negating it would
+ make the high part zero, we can (usually) eliminate one insn. */
WARNING: Block comments use a trailing */ on a separate line
#33: FILE: tcg/riscv/tcg-target.inc.c:711:
+ make the high part zero, we can (usually) eliminate one insn. */
WARNING: Block comments use a leading /* on a separate line
#40: FILE: tcg/riscv/tcg-target.inc.c:718:
+ /* By operating on the high part first, we get to use the final
WARNING: Block comments use * on subsequent lines
#41: FILE: tcg/riscv/tcg-target.inc.c:719:
+ /* By operating on the high part first, we get to use the final
+ carry operation to move back from the temporary. */
WARNING: Block comments use a trailing */ on a separate line
#41: FILE: tcg/riscv/tcg-target.inc.c:719:
+ carry operation to move back from the temporary. */
total: 0 errors, 6 warnings, 58 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 15/42: tcg/riscv: Add branch and jump instructions...
Checking PATCH 16/42: tcg/riscv: Add slowpath load and store instructions...
WARNING: Block comments use a leading /* on a separate line
#48: FILE: tcg/riscv/tcg-target.inc.c:925:
+/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
WARNING: Block comments use a leading /* on a separate line
#70: FILE: tcg/riscv/tcg-target.inc.c:947:
+/* helper signature: helper_ret_st_mmu(CPUState *env, target_ulong addr,
WARNING: Block comments use a leading /* on a separate line
#175: FILE: tcg/riscv/tcg-target.inc.c:1052:
+ /* TODO: Move this out of line
total: 0 errors, 3 warnings, 259 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 17/42: tcg/riscv: Add direct load and store instructions...
ERROR: spaces required around that '*' (ctx:WxV)
#76: FILE: tcg/riscv/tcg-target.inc.c:1209:
+ tcg_insn_unit *label_ptr[1];
^
ERROR: spaces required around that '*' (ctx:WxV)
#147: FILE: tcg/riscv/tcg-target.inc.c:1280:
+ tcg_insn_unit *label_ptr[1];
^
total: 2 errors, 0 warnings, 161 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 18/42: tcg/riscv: Add the out op decoder...
Checking PATCH 19/42: tcg/riscv: Add the prologue generation and register the JIT...
Checking PATCH 20/42: tcg/riscv: Add the target init code...
Checking PATCH 21/42: tcg: Add RISC-V cpu signal handler...
WARNING: Block comments use a leading /* on a separate line
#32: FILE: accel/tcg/user-exec.c:585:
+ /* Detect store by reading the instruction at the program
WARNING: Block comments use * on subsequent lines
#33: FILE: accel/tcg/user-exec.c:586:
+ /* Detect store by reading the instruction at the program
+ counter. Note: we currently only generate 32-bit
WARNING: Block comments use a trailing */ on a separate line
#34: FILE: accel/tcg/user-exec.c:587:
+ instructions so we thus only detect 32-bit stores */
total: 0 errors, 3 warnings, 81 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 22/42: disas: Add RISC-V support...
WARNING: architecture specific defines should be avoided
#24: FILE: disas.c:526:
+#if defined(_ILP32) || (__riscv_xlen == 32)
total: 0 errors, 1 warnings, 16 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 23/42: configure: Add support for building RISC-V host...
Checking PATCH 24/42: disas/microblaze: Remove unused REG_SP macro...
Checking PATCH 25/42: linux-user: Add safe_syscall for riscv64 host...
WARNING: architecture specific defines should be avoided
#21: FILE: linux-user/host/riscv64/hostdep.h:14:
+#ifndef __ASSEMBLER__
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#43:
new file mode 100644
total: 0 errors, 2 warnings, 104 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 26/42: tcg: Renumber TCG_CALL_* flags...
Checking PATCH 27/42: tcg: Add TCG_CALL_NO_RETURN...
Checking PATCH 28/42: tcg: Reference count labels...
ERROR: spaces prohibited around that ':' (ctx:WxW)
#84: FILE: tcg/tcg.h:247:
+ unsigned id : 15;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#85: FILE: tcg/tcg.h:248:
+ unsigned refs : 16;
^
total: 2 errors, 0 warnings, 56 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 29/42: tcg: Add reachable_code_pass...
Checking PATCH 30/42: tcg: Add preferred_reg argument to tcg_reg_alloc...
WARNING: Block comments use a leading /* on a separate line
#62: FILE: tcg/tcg.c:2920:
+/**
WARNING: Block comments use a leading /* on a separate line
#88: FILE: tcg/tcg.c:2942:
+ /* Skip the preferred_regs option if it cannot be satisfied,
WARNING: Block comments use * on subsequent lines
#89: FILE: tcg/tcg.c:2943:
+ /* Skip the preferred_regs option if it cannot be satisfied,
+ or if the preference made no difference. */
WARNING: Block comments use a trailing */ on a separate line
#89: FILE: tcg/tcg.c:2943:
+ or if the preference made no difference. */
total: 0 errors, 4 warnings, 164 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 31/42: tcg: Add preferred_reg argument to temp_load...
Checking PATCH 32/42: tcg: Add preferred_reg argument to temp_sync...
Checking PATCH 33/42: tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi...
Checking PATCH 34/42: tcg: Add output_pref to TCGOp...
Checking PATCH 35/42: tcg: Improve register allocation for matching constraints...
Checking PATCH 36/42: tcg: Dump register preference info with liveness...
Checking PATCH 37/42: tcg: Reindent parts of liveness_pass_1...
Checking PATCH 38/42: tcg: Rename and adjust liveness_pass_1 helpers...
Checking PATCH 39/42: tcg: Split out more subroutines from liveness_pass_1...
Checking PATCH 40/42: tcg: Add TCG_OPF_BB_EXIT...
Checking PATCH 41/42: tcg: Record register preferences during liveness...
WARNING: Block comments use a leading /* on a separate line
#27: FILE: tcg/tcg.c:2374:
+/* For liveness_pass_1, reset the preferences for a given temp to the
WARNING: Block comments use a leading /* on a separate line
#209: FILE: tcg/tcg.c:2555:
+ /* For those arguments that die, and will be allocated
WARNING: Block comments use a leading /* on a separate line
#221: FILE: tcg/tcg.c:2567:
+ /* For each input argument, add its input register to prefs.
WARNING: Block comments use * on subsequent lines
#222: FILE: tcg/tcg.c:2568:
+ /* For each input argument, add its input register to prefs.
+ If a temp is used once, this produces a single set bit. */
WARNING: Block comments use a trailing */ on a separate line
#222: FILE: tcg/tcg.c:2568:
+ If a temp is used once, this produces a single set bit. */
WARNING: Block comments use a leading /* on a separate line
#298: FILE: tcg/tcg.c:2729:
+ /* For operands that were dead, initially allow
WARNING: Block comments use * on subsequent lines
#299: FILE: tcg/tcg.c:2730:
+ /* For operands that were dead, initially allow
+ all regs for the type. */
WARNING: Block comments use a trailing */ on a separate line
#299: FILE: tcg/tcg.c:2730:
+ all regs for the type. */
WARNING: Block comments use a leading /* on a separate line
#309: FILE: tcg/tcg.c:2740:
+ /* Note that these are TCG_OPF_NOT_PRESENT and do not
WARNING: Block comments use * on subsequent lines
#310: FILE: tcg/tcg.c:2741:
+ /* Note that these are TCG_OPF_NOT_PRESENT and do not
+ have proper constraints. That said, special case
WARNING: Block comments use a trailing */ on a separate line
#311: FILE: tcg/tcg.c:2742:
+ moves to propagate preferences backward. */
total: 0 errors, 11 warnings, 318 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 42/42: tcg: Improve call argument loading...
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20181225205529.10874-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
On Tue, 25 Dec 2018 at 20:55, Richard Henderson <richard.henderson@linaro.org> wrote: > > The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea: > > Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging (2018-12-22 11:25:31 +0000) > > are available in the Git repository at: > > https://github.com/rth7680/qemu.git tags/pull-tcg-20181226 > > for you to fetch changes up to 4250da10923347c9ee907f8d72bd93dfa5ee8742: > > tcg: Improve call argument loading (2018-12-26 06:58:43 +1100) > > ---------------------------------------------------------------- > Host support for riscv64. > Dead code elimination pass. > Register allocation improvements. > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0 for any user-visible changes. -- PMM
The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea: Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging (2018-12-22 11:25:31 +0000) are available in the Git repository at: https://github.com/rth7680/qemu.git tags/pull-tcg-20181226 for you to fetch changes up to 4250da10923347c9ee907f8d72bd93dfa5ee8742: tcg: Improve call argument loading (2018-12-26 06:58:43 +1100) ---------------------------------------------------------------- Host support for riscv64. Dead code elimination pass. Register allocation improvements. ---------------------------------------------------------------- Alistair Francis (23): elf.h: Add the RISCV ELF magic numbers linux-user: Add host dependency for RISC-V 32-bit linux-user: Add host dependency for RISC-V 64-bit exec: Add RISC-V GCC poison macro tcg/riscv: Add the tcg-target.h file tcg/riscv: Add the tcg target registers tcg/riscv: Add support for the constraints tcg/riscv: Add the immediate encoders tcg/riscv: Add the instruction emitters tcg/riscv: Add the relocation functions tcg/riscv: Add the mov and movi instruction tcg/riscv: Add the extract instructions tcg/riscv: Add the out load and store instructions tcg/riscv: Add the add2 and sub2 instructions tcg/riscv: Add branch and jump instructions tcg/riscv: Add slowpath load and store instructions tcg/riscv: Add direct load and store instructions tcg/riscv: Add the out op decoder tcg/riscv: Add the prologue generation and register the JIT tcg/riscv: Add the target init code tcg: Add RISC-V cpu signal handler disas: Add RISC-V support configure: Add support for building RISC-V host Richard Henderson (19): disas/microblaze: Remove unused REG_SP macro linux-user: Add safe_syscall for riscv64 host tcg: Renumber TCG_CALL_* flags tcg: Add TCG_CALL_NO_RETURN tcg: Reference count labels tcg: Add reachable_code_pass tcg: Add preferred_reg argument to tcg_reg_alloc tcg: Add preferred_reg argument to temp_load tcg: Add preferred_reg argument to temp_sync tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi tcg: Add output_pref to TCGOp tcg: Improve register allocation for matching constraints tcg: Dump register preference info with liveness tcg: Reindent parts of liveness_pass_1 tcg: Rename and adjust liveness_pass_1 helpers tcg: Split out more subroutines from liveness_pass_1 tcg: Add TCG_OPF_BB_EXIT tcg: Record register preferences during liveness tcg: Improve call argument loading include/elf.h | 55 + include/exec/helper-head.h | 13 + include/exec/helper-tcg.h | 21 +- include/exec/poison.h | 1 + linux-user/host/riscv32/hostdep.h | 11 + linux-user/host/riscv64/hostdep.h | 34 + tcg/riscv/tcg-target.h | 177 +++ tcg/tcg-op.h | 1 + tcg/tcg-opc.h | 7 +- tcg/tcg.h | 31 +- accel/tcg/user-exec.c | 75 ++ disas.c | 10 +- disas/microblaze.c | 1 - tcg/riscv/tcg-target.inc.c | 1949 ++++++++++++++++++++++++++++ tcg/tcg-op.c | 2 + tcg/tcg.c | 626 +++++++-- MAINTAINERS | 12 +- configure | 12 +- linux-user/host/riscv64/safe-syscall.inc.S | 77 ++ 19 files changed, 2948 insertions(+), 167 deletions(-) create mode 100644 linux-user/host/riscv32/hostdep.h create mode 100644 linux-user/host/riscv64/hostdep.h create mode 100644 tcg/riscv/tcg-target.h create mode 100644 tcg/riscv/tcg-target.inc.c create mode 100644 linux-user/host/riscv64/safe-syscall.inc.S