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[PULL,00/31] tcg: gvec improvments

Message ID 20190514000540.4313-1-richard.henderson@linaro.org
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Series tcg: gvec improvments | expand

Message

Richard Henderson May 14, 2019, 12:05 a.m. UTC 
Most of these patches are in support of David's guest vector
patches for target/s390x.


r~


The following changes since commit e24f44dbeab8e54c72bdaedbd35453fb2a6c38da:

  Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-05-13' into staging (2019-05-13 16:52:56 +0100)

are available in the Git repository at:

  https://github.com/rth7680/qemu.git tags/pull-tcg-20190513

for you to fetch changes up to a7b6d286cfb5205b9f5330aefc5727269b3d810f:

  tcg/aarch64: Do not advertise minmax for MO_64 (2019-05-13 22:52:08 +0000)

----------------------------------------------------------------
Improve code generation for vector duplication.
Add vector expansions for shifts by non-constant scalar.
Add vector expansions for shifts by vector.
Add integer and vector expansions for absolute value.
Several patches in preparation for Altivec.
Bug fix for tcg/aarch64 vs min/max.

----------------------------------------------------------------
David Hildenbrand (1):
      tcg: Implement tcg_gen_gvec_3i()

Philippe Mathieu-Daudé (2):
      target/ppc: Use tcg_gen_abs_i32
      target/tricore: Use tcg_gen_abs_tl

Richard Henderson (28):
      tcg: Do not recreate INDEX_op_neg_vec unless supported
      tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded
      tcg: Specify optional vector requirements with a list
      tcg: Assert fixed_reg is read-only
      tcg/arm: Use tcg_out_mov_reg in tcg_out_mov
      tcg: Return bool success from tcg_out_mov
      tcg: Support cross-class moves without instruction support
      tcg: Promote tcg_out_{dup,dupi}_vec to backend interface
      tcg: Manually expand INDEX_op_dup_vec
      tcg: Add tcg_out_dupm_vec to the backend interface
      tcg/i386: Implement tcg_out_dupm_vec
      tcg/aarch64: Implement tcg_out_dupm_vec
      tcg: Add INDEX_op_dupm_vec
      tcg: Add gvec expanders for variable shift
      tcg/i386: Support vector variable shift opcodes
      tcg/aarch64: Support vector variable shift opcodes
      tcg: Add gvec expanders for vector shift by scalar
      tcg/i386: Support vector scalar shift opcodes
      tcg: Add support for integer absolute value
      tcg: Add support for vector absolute value
      tcg/i386: Support vector absolute value
      tcg/aarch64: Support vector absolute value
      target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs
      target/cris: Use tcg_gen_abs_tl
      target/ppc: Use tcg_gen_abs_tl
      target/s390x: Use tcg_gen_abs_i64
      target/xtensa: Use tcg_gen_abs_i32
      tcg/aarch64: Do not advertise minmax for MO_64

 accel/tcg/tcg-runtime.h             |  20 +
 target/arm/helper.h                 |   2 -
 tcg/aarch64/tcg-target.h            |   3 +-
 tcg/aarch64/tcg-target.opc.h        |   2 +
 tcg/i386/tcg-target.h               |   5 +-
 tcg/tcg-op-gvec.h                   |  64 ++-
 tcg/tcg-op.h                        |  14 +
 tcg/tcg-opc.h                       |   2 +
 tcg/tcg.h                           |  21 +
 accel/tcg/tcg-runtime-gvec.c        | 192 ++++++++
 target/arm/neon_helper.c            |   5 -
 target/arm/translate-a64.c          |  41 +-
 target/arm/translate-sve.c          |   9 +-
 target/arm/translate.c              | 144 +++---
 target/cris/translate.c             |   9 +-
 target/ppc/translate.c              |  68 +--
 target/ppc/translate/spe-impl.inc.c |  14 +-
 target/ppc/translate/vmx-impl.inc.c |   7 +-
 target/s390x/translate.c            |   8 +-
 target/tricore/translate.c          |  27 +-
 target/xtensa/translate.c           |   9 +-
 tcg/aarch64/tcg-target.inc.c        | 121 ++++-
 tcg/arm/tcg-target.inc.c            |   5 +-
 tcg/i386/tcg-target.inc.c           | 163 ++++++-
 tcg/mips/tcg-target.inc.c           |   3 +-
 tcg/optimize.c                      |   8 +-
 tcg/ppc/tcg-target.inc.c            |   3 +-
 tcg/riscv/tcg-target.inc.c          |   5 +-
 tcg/s390/tcg-target.inc.c           |   3 +-
 tcg/sparc/tcg-target.inc.c          |   3 +-
 tcg/tcg-op-gvec.c                   | 945 ++++++++++++++++++++++++++++++------
 tcg/tcg-op-vec.c                    | 270 ++++++++++-
 tcg/tcg-op.c                        |  20 +
 tcg/tcg.c                           | 271 +++++++++--
 tcg/tci/tcg-target.inc.c            |   3 +-
 tcg/README                          |   4 +
 36 files changed, 2020 insertions(+), 473 deletions(-)

Comments

Peter Maydell May 14, 2019, 12:35 p.m. UTC | #1 
On Tue, 14 May 2019 at 01:22, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Most of these patches are in support of David's guest vector

> patches for target/s390x.

>

>

> r~

>

>

> The following changes since commit e24f44dbeab8e54c72bdaedbd35453fb2a6c38da:

>

>   Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-05-13' into staging (2019-05-13 16:52:56 +0100)

>

> are available in the Git repository at:

>

>   https://github.com/rth7680/qemu.git tags/pull-tcg-20190513

>

> for you to fetch changes up to a7b6d286cfb5205b9f5330aefc5727269b3d810f:

>

>   tcg/aarch64: Do not advertise minmax for MO_64 (2019-05-13 22:52:08 +0000)

>

> ----------------------------------------------------------------

> Improve code generation for vector duplication.

> Add vector expansions for shifts by non-constant scalar.

> Add vector expansions for shifts by vector.

> Add integer and vector expansions for absolute value.

> Several patches in preparation for Altivec.

> Bug fix for tcg/aarch64 vs min/max.

>



Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM