[00/21] target/xtensa: implement double precision FPU

Message ID	20200706234737.32378-1-jcmvbkbc@gmail.com
Headers	show Return-Path: <SRS0=h+Ky=AR=nongnu.org=qemu-devel-bounces+qemu-devel=archiver.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6203B206E9 From: Max Filippov <jcmvbkbc@gmail.com> To: qemu-devel@nongnu.org Subject: [PATCH 00/21] target/xtensa: implement double precision FPU Date: Mon, 6 Jul 2020 16:47:16 -0700 Message-Id: <20200706234737.32378-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=jcmvbkbc@gmail.com; helo=mail-pg1-x52f.google.com Precedence: list Cc: Max Filippov <jcmvbkbc@gmail.com> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org>
Series	target/xtensa: implement double precision FPU \| expand [00/21] target/xtensa: implement double precision FPU [01/21] softfloat: make NO_SIGNALING_NANS runtime property [03/21] softfloat: add xtensa specialization for pickNaNMulAdd [06/21] target/xtensa: rename FPU2000 translators and helpers [07/21] target/xtensa: move FSR/FCR register accessors [08/21] target/xtensa: don't access BR regfile directly [11/21] tests/tcg/xtensa: fix test execution on ISS [12/21] tests/tcg/xtensa: update test_fp0_arith for DFPU [17/21] tests/tcg/xtensa: add fp0 div and sqrt tests [18/21] tests/tcg/xtensa: test double precision load/store [20/21] target/xtensa: import DE_233L_FPU core

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20200706234737.32378-1-jcmvbkbc@gmail.com

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From: Max Filippov <jcmvbkbc@gmail.com>
To: qemu-devel@nongnu.org
Subject: [PATCH 00/21] target/xtensa: implement double precision FPU
Date: Mon,  6 Jul 2020 16:47:16 -0700
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Series

target/xtensa: implement double precision FPU | expand

Message

Max Filippov July 6, 2020, 11:47 p.m. UTC

Hello,

this series implements double precision floating point unit option for
target/xtensa, updates FPU tests and adds two new CPU cores, one with
FPU2000 option and one with DFPU option.

Max Filippov (21):
  softfloat: make NO_SIGNALING_NANS runtime property
  softfloat: pass float_status pointer to pickNaN
  softfloat: add xtensa specialization for pickNaNMulAdd
  target/xtensa: add geometry to xtensa_get_regfile_by_name
  target/xtensa: support copying registers up to 64 bits wide
  target/xtensa: rename FPU2000 translators and helpers
  target/xtensa: move FSR/FCR register accessors
  target/xtensa: don't access BR regfile directly
  target/xtensa: add DFP option, registers and opcodes
  target/xtensa: implement FPU division and square root
  tests/tcg/xtensa: fix test execution on ISS
  tests/tcg/xtensa: update test_fp0_arith for DFPU
  tests/tcg/xtensa: expand madd tests
  tests/tcg/xtensa: update test_fp0_conv for DFPU
  tests/tcg/xtensa: update test_fp1 for DFPU
  tests/tcg/xtensa: update test_lsc for DFPU
  tests/tcg/xtensa: add fp0 div and sqrt tests
  tests/tcg/xtensa: test double precision load/store
  tests/tcg/xtensa: add DFP0 arith tests
  target/xtensa: import DE_233L_FPU core
  target/xtensa: import DSP3400 core

 fpu/softfloat-specialize.inc.c                |    276 +-
 fpu/softfloat.c                               |      2 +-
 include/fpu/softfloat-helpers.h               |     10 +
 include/fpu/softfloat-types.h                 |      2 +
 target/xtensa/Makefile.objs                   |      2 +
 target/xtensa/core-DE_233L_FPU.c              |     31 +
 target/xtensa/core-DE_233L_FPU/core-isa.h     |    727 +
 target/xtensa/core-DE_233L_FPU/core-matmap.h  |    717 +
 .../xtensa/core-DE_233L_FPU/gdb-config.inc.c  |    277 +
 .../core-DE_233L_FPU/xtensa-modules.inc.c     |  20758 ++
 target/xtensa/core-dsp3400.c                  |     31 +
 target/xtensa/core-dsp3400/core-isa.h         |    452 +
 target/xtensa/core-dsp3400/core-matmap.h      |    312 +
 target/xtensa/core-dsp3400/gdb-config.inc.c   |    400 +
 .../xtensa/core-dsp3400/xtensa-modules.inc.c  | 171906 +++++++++++++++
 target/xtensa/cpu.c                           |      4 +
 target/xtensa/cpu.h                           |      7 +-
 target/xtensa/fpu_helper.c                    |    314 +-
 target/xtensa/helper.c                        |      4 +-
 target/xtensa/helper.h                        |     53 +-
 target/xtensa/overlay_tool.h                  |      6 +
 target/xtensa/translate.c                     |   1345 +-
 tests/tcg/xtensa/fpu.h                        |    142 +
 tests/tcg/xtensa/macros.inc                   |     10 +-
 tests/tcg/xtensa/test_dfp0_arith.S            |    153 +
 tests/tcg/xtensa/test_fp0_arith.S             |    266 +-
 tests/tcg/xtensa/test_fp0_conv.S              |    299 +-
 tests/tcg/xtensa/test_fp0_div.S               |     82 +
 tests/tcg/xtensa/test_fp0_sqrt.S              |     76 +
 tests/tcg/xtensa/test_fp1.S                   |     62 +-
 tests/tcg/xtensa/test_lsc.S                   |    170 +-
 31 files changed, 198354 insertions(+), 542 deletions(-)
 create mode 100644 target/xtensa/core-DE_233L_FPU.c
 create mode 100644 target/xtensa/core-DE_233L_FPU/core-isa.h
 create mode 100644 target/xtensa/core-DE_233L_FPU/core-matmap.h
 create mode 100644 target/xtensa/core-DE_233L_FPU/gdb-config.inc.c
 create mode 100644 target/xtensa/core-DE_233L_FPU/xtensa-modules.inc.c
 create mode 100644 target/xtensa/core-dsp3400.c
 create mode 100644 target/xtensa/core-dsp3400/core-isa.h
 create mode 100644 target/xtensa/core-dsp3400/core-matmap.h
 create mode 100644 target/xtensa/core-dsp3400/gdb-config.inc.c
 create mode 100644 target/xtensa/core-dsp3400/xtensa-modules.inc.c
 create mode 100644 tests/tcg/xtensa/fpu.h
 create mode 100644 tests/tcg/xtensa/test_dfp0_arith.S
 create mode 100644 tests/tcg/xtensa/test_fp0_div.S
 create mode 100644 tests/tcg/xtensa/test_fp0_sqrt.S