| Message ID | 20201008024203.112303-1-shashi.mallela@linaro.org |
|---|---|
| Headers | show |
| Series | Add watchdog support for SbsaQemu | expand |
Hi. one small note below in this email. On Thu, 8 Oct 2020 at 05:43, Shashi Mallela <shashi.mallela@linaro.org> wrote: > > Included the newly implemented SBSA generic watchdog device model into > SBSA platform > > Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org> > --- > hw/arm/sbsa-ref.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 44 insertions(+) > > diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c > index 9c3a893bedfd..1e6ef124924c 100644 > --- a/hw/arm/sbsa-ref.c > +++ b/hw/arm/sbsa-ref.c > @@ -40,6 +40,7 @@ > #include "hw/qdev-properties.h" > #include "hw/usb.h" > #include "hw/char/pl011.h" > +#include "hw/watchdog/wdt_sbsa_gwdt.h" > #include "net/net.h" > #include "qom/object.h" > > @@ -64,6 +65,9 @@ enum { > SBSA_GIC_DIST, > SBSA_GIC_REDIST, > SBSA_SECURE_EC, > + SBSA_GWDT, > + SBSA_GWDT_REFRESH, > + SBSA_GWDT_CONTROL, > SBSA_SMMU, > SBSA_UART, > SBSA_RTC, > @@ -104,6 +108,8 @@ static const MemMapEntry sbsa_ref_memmap[] = { > [SBSA_GIC_DIST] = { 0x40060000, 0x00010000 }, > [SBSA_GIC_REDIST] = { 0x40080000, 0x04000000 }, > [SBSA_SECURE_EC] = { 0x50000000, 0x00001000 }, > + [SBSA_GWDT_REFRESH] = { 0x50010000, 0x00001000 }, > + [SBSA_GWDT_CONTROL] = { 0x50011000, 0x00001000 }, > [SBSA_UART] = { 0x60000000, 0x00001000 }, > [SBSA_RTC] = { 0x60010000, 0x00001000 }, > [SBSA_GPIO] = { 0x60020000, 0x00001000 }, > @@ -133,6 +139,7 @@ static const int sbsa_ref_irqmap[] = { > [SBSA_SECURE_UART_MM] = 9, > [SBSA_AHCI] = 10, > [SBSA_EHCI] = 11, > + [SBSA_GWDT] = 12, > }; > > static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) > @@ -141,6 +148,26 @@ static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) > return arm_cpu_mp_affinity(idx, clustersz); > } > > +static void create_wdt_fdt(SBSAMachineState *sms) > +{ > + char *nodename; > + const char compat[] = "arm,sbsa-gwdt"; > + > + hwaddr rbase = sbsa_ref_memmap[SBSA_GWDT_REFRESH].base; > + hwaddr cbase = sbsa_ref_memmap[SBSA_GWDT_CONTROL].base; > + > + nodename = g_strdup_printf("/watchdog@%" PRIx64, rbase); > + qemu_fdt_add_subnode(sms->fdt, nodename); > + > + qemu_fdt_setprop(sms->fdt, nodename, "compatible", > + compat, sizeof(compat)); > + qemu_fdt_setprop_sized_cells(sms->fdt, nodename, "reg", > + 2, rbase, 2, SBSA_GWDT_RMMIO_SIZE, > + 2, cbase, 2, SBSA_GWDT_CMMIO_SIZE); You can also add "interrupts" here if you implemented irq in the driver. BR, Maxim. > + qemu_fdt_setprop_cell(sms->fdt, nodename, "timeout-sec", 30); > + g_free(nodename); > +} > + > /* > * Firmware on this machine only uses ACPI table to load OS, these limited > * device tree nodes are just to let firmware know the info which varies from > @@ -219,6 +246,7 @@ static void create_fdt(SBSAMachineState *sms) > > g_free(nodename); > } > + create_wdt_fdt(sms); > } > > #define SBSA_FLASH_SECTOR_SIZE (256 * KiB) > @@ -447,6 +475,20 @@ static void create_rtc(const SBSAMachineState *sms) > sysbus_create_simple("pl031", base, qdev_get_gpio_in(sms->gic, irq)); > } > > +static void create_wdt(const SBSAMachineState *sms) > +{ > + hwaddr rbase = sbsa_ref_memmap[SBSA_GWDT_REFRESH].base; > + hwaddr cbase = sbsa_ref_memmap[SBSA_GWDT_CONTROL].base; > + DeviceState *dev = qdev_new(TYPE_WDT_SBSA_GWDT); > + SysBusDevice *s = SYS_BUS_DEVICE(dev); > + int irq = sbsa_ref_irqmap[SBSA_GWDT]; > + > + sysbus_realize_and_unref(s, &error_fatal); > + sysbus_mmio_map(s, 0, rbase); > + sysbus_mmio_map(s, 1, cbase); > + sysbus_connect_irq(s, 0, qdev_get_gpio_in(sms->gic, irq)); > +} > + > static DeviceState *gpio_key_dev; > static void sbsa_ref_powerdown_req(Notifier *n, void *opaque) > { > @@ -730,6 +772,8 @@ static void sbsa_ref_init(MachineState *machine) > > create_rtc(sms); > > + create_wdt(sms); > + > create_gpio(sms); > > create_ahci(sms); > -- > 2.18.4 > >