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Mon, 12 Oct 2020 20:36:23 GMT From: Victor Kamensky To: =?utf-8?q?Herv=C3=A9_Poussineau?= , Aleksandar Rikalo Cc: qemu-devel@nongnu.org, Aleksandar Markovic , Aurelien Jarno , Jiaxun Yang , Peter Maydell , Richard Purdie , Khem Raj Subject: [PATCH 0/1] mips: add 34Kf-64tlb fictitious cpu type like 34Kf but with 64 TLBs Date: Mon, 12 Oct 2020 13:36:12 -0700 Message-Id: <20201012203613.85823-1-kamensky@cisco.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 X-Authenticated-User: kamensky@cisco.com X-Outbound-SMTP-Client: 10.24.37.191, [10.24.37.191] X-Outbound-Node: alln-core-6.cisco.com Received-SPF: pass client-ip=173.37.142.90; envelope-from=kamensky@cisco.com; helo=alln-iport-3.cisco.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/12 16:36:25 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -118 X-Spam_score: -11.9 X-Spam_bar: ----------- X-Spam_report: (-11.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Qenu MIPS guys, Could you please review and, if possible, accept a simple patch, following this cover letter, that introduces new fictitious 34Kf-64tlb MIPS cpu model. It is exact copy of 34Kf MIPS cpu model only the number of TLBs is bumped up from 16 to 64. This change and use of 34Kf-64tlb model brings up performance of running non-trivial Linux user-land load under qemu-system-mips by 40% or more. Yocto Project uses qemu-system-mips 34Kf cpu model, as recommended by [1], to run 32bit MIPS CI loop. It was observed that in this case CI test execution time was almost twice longer [2] than 64bit MIPS variant that runs under MIPS64R2-generic model. It was investigated [3] and concluded that the difference in number of TLBs 16 in 34Kf case vs 64 in MIPS64R2-generic is responsible for most of CI real time execution diffrence. Because with 16 TLBs linux user-land trashes TLB more and it needs to execute more instructions in TLB refill handler calls, as result it runs much longer. Proposed fix that Yocto Project adopted locally already as private patch is to create and use 34Kf-64tlb cpu model, that is the same as 34Kf but with bigger number of TLBs. Yocto Project would appreciate very much if this change can be accepted by qemu project. It would reduce burden of porting forward private patch. Other users of qemu-system-mips could benefit from the change and new model as well. Thanks, Victor [1] https://www.qemu.org/docs/master/system/target-mips.html#preferred-cpu-models-for-mips-hosts [2] https://bugzilla.yoctoproject.org/show_bug.cgi?id=13992 [3] https://lists.openembedded.org/g/openembedded-core/message/143099 Victor Kamensky (1): mips: add 34Kf-64tlb fictitious cpu type like 34Kf but with 64 TLBs target/mips/translate_init.c.inc | 55 ++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+)