[v3,00/15] gdbstub/next (MemTxAttrs, re-factoring)

Message ID	20220927141504.3886314-1-alex.bennee@linaro.org
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org> To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org> Subject: [PATCH v3 00/15] gdbstub/next (MemTxAttrs, re-factoring) Date: Tue, 27 Sep 2022 15:14:49 +0100 Message-Id: <20220927141504.3886314-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	gdbstub/next (MemTxAttrs, re-factoring) \| expand [v3,00/15] gdbstub/next (MemTxAttrs, re-factoring) [v3,01/15] hw: encode accessing CPU index in MemTxAttrs [v3,02/15] target/arm: ensure TCG IO accesses set appropriate MemTxAttrs [v3,03/15] target/arm: ensure HVF traps set appropriate MemTxAttrs [v3,04/15] target/arm: ensure KVM traps set appropriate MemTxAttrs [v3,05/15] target/arm: ensure ptw accesses set appropriate MemTxAttrs [v3,06/15] target/arm: ensure m-profile helpers set appropriate MemTxAttrs [v3,07/15] qtest: make read/write operation appear to be from CPU [v3,08/15] hw/intc/gic: use MxTxAttrs to divine accessing CPU [v3,09/15] hw/timer: convert mptimer access to attrs to derive cpu index [v3,10/15] configure: move detected gdb to TCG's config-host.mak [v3,11/15] gdbstub: move into its own sub directory [v3,12/15] gdbstub: move sstep flags probing into AccelClass [v3,13/15] gdbstub: move breakpoint logic to accel ops [v3,14/15] gdbstub: move guest debug support check to ops [v3,15/15] accel/kvm: move kvm_update_guest_debug to inline stub

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20220927141504.3886314-1-alex.bennee@linaro.org

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Subject: [PATCH  v3 00/15] gdbstub/next (MemTxAttrs, re-factoring)
Date: Tue, 27 Sep 2022 15:14:49 +0100
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Series

gdbstub/next (MemTxAttrs, re-factoring) | expand

Message

Alex Bennée Sept. 27, 2022, 2:14 p.m. UTC

Hi,

Following feedback on the MemTxAttrs updates we now:

  - move unspecified to requester_type
  - document a machine specific decoding of requester_id
  - update the existing users
  - update HVF/KVM/m-profile/page-walking access functions
  - fail with MEMTX_ACCESS_ERROR if non-CPU accesses GIC

I suspect this will be my last run at this for a while so if it is
still wanting I'll split off the re-factoring work for a PR so it is
not held up. The following still need review:

 - accel/kvm: move kvm_update_guest_debug to inline stub
 - qtest: make read/write operation appear to be from CPU
 - target/arm: ensure m-profile helpers set appropriate MemTxAttrs
 - target/arm: ensure ptw accesses set appropriate MemTxAttrs
 - target/arm: ensure KVM traps set appropriate MemTxAttrs
 - target/arm: ensure HVF traps set appropriate MemTxAttrs
 - target/arm: ensure TCG IO accesses set appropriate MemTxAttrs
 - hw: encode accessing CPU index in MemTxAttrs


Alex Bennée (15):
  hw: encode accessing CPU index in MemTxAttrs
  target/arm: ensure TCG IO accesses set appropriate MemTxAttrs
  target/arm: ensure HVF traps set appropriate MemTxAttrs
  target/arm: ensure KVM traps set appropriate MemTxAttrs
  target/arm: ensure ptw accesses set appropriate MemTxAttrs
  target/arm: ensure m-profile helpers set appropriate MemTxAttrs
  qtest: make read/write operation appear to be from CPU
  hw/intc/gic: use MxTxAttrs to divine accessing CPU
  hw/timer: convert mptimer access to attrs to derive cpu index
  configure: move detected gdb to TCG's config-host.mak
  gdbstub: move into its own sub directory
  gdbstub: move sstep flags probing into AccelClass
  gdbstub: move breakpoint logic to accel ops
  gdbstub: move guest debug support check to ops
  accel/kvm: move kvm_update_guest_debug to inline stub

 configure                      |   7 ++
 meson.build                    |   4 +-
 accel/kvm/kvm-cpus.h           |   4 +
 gdbstub/internals.h            |  17 ++++
 gdbstub/trace.h                |   1 +
 include/exec/memattrs.h        |  39 ++++++--
 include/qemu/accel.h           |  12 +++
 include/sysemu/accel-ops.h     |   7 ++
 include/sysemu/cpus.h          |   3 +
 include/sysemu/kvm.h           |  36 +++----
 accel/accel-common.c           |  10 ++
 accel/kvm/kvm-accel-ops.c      |   9 ++
 accel/kvm/kvm-all.c            |  48 ++++-----
 accel/stubs/kvm-stub.c         |  21 ----
 accel/tcg/tcg-accel-ops.c      |  98 +++++++++++++++++++
 accel/tcg/tcg-all.c            |  17 ++++
 gdbstub.c => gdbstub/gdbstub.c | 156 +++--------------------------
 gdbstub/softmmu.c              |  51 ++++++++++
 gdbstub/user.c                 |  68 +++++++++++++
 hw/i386/amd_iommu.c            |   3 +-
 hw/i386/intel_iommu.c          |   2 +-
 hw/intc/arm_gic.c              | 174 ++++++++++++++++++++++-----------
 hw/misc/tz-mpc.c               |   2 +-
 hw/misc/tz-msc.c               |   8 +-
 hw/pci/pci.c                   |   7 +-
 hw/timer/arm_mptimer.c         |  25 ++---
 softmmu/cpus.c                 |   7 ++
 softmmu/qtest.c                |  26 ++---
 target/arm/hvf/hvf.c           |   4 +-
 target/arm/kvm.c               |  12 ++-
 target/arm/m_helper.c          |  12 +--
 target/arm/ptw.c               |   7 +-
 MAINTAINERS                    |   2 +-
 gdbstub/meson.build            |   9 ++
 gdbstub/trace-events           |  29 ++++++
 trace-events                   |  28 ------
 36 files changed, 615 insertions(+), 350 deletions(-)
 create mode 100644 gdbstub/internals.h
 create mode 100644 gdbstub/trace.h
 rename gdbstub.c => gdbstub/gdbstub.c (95%)
 create mode 100644 gdbstub/softmmu.c
 create mode 100644 gdbstub/user.c
 create mode 100644 gdbstub/meson.build
 create mode 100644 gdbstub/trace-events