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[88.28.18.183]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e969ddb64sm144649535e9.8.2024.09.30.02.11.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Sep 2024 02:11:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Aurelien Jarno , =?utf-8?q?Herv=C3=A9_Poussineau?= , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= , Richard Henderson , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , Anton Johansson Subject: [PATCH 00/12] target/mips: Remove target-specific endianness knowledge Date: Mon, 30 Sep 2024 11:10:49 +0200 Message-ID: <20240930091101.40591-1-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Get vCPU endianness from CP0::BE bit. Propagate endianness at the board level, using QOM property. Remove target-specific endianness knowledge from target/. Philippe Mathieu-Daudé (12): target/mips: Declare cpu_is_bigendian_env() in 'internal.h' target/mips: Introduce mo_endian_env() helper target/mips: Replace MO_TE by mo_endian_env() in get_pte() target/mips: Convert mips16e decr_and_load/store() macros to functions target/mips: Introduce mo_endian() helper target/mips: Explode MO_TExx -> MO_TE | MO_xx target/mips: Replace MO_TE by mo_endian() target/mips: Expose MIPSCPU::is_big_endian property hw/mips/cps: Set the vCPU 'cpu-big-endian' property hw/mips: Have mips_cpu_create_with_clock() take an endianness argument target/mips: Remove target-specific code in mips_cpu_reset_hold() hw/mips/malta: Remove TARGET_BIG_ENDIAN #ifdef'ry include/hw/mips/cps.h | 1 + target/mips/cpu.h | 7 +- target/mips/internal.h | 11 ++ target/mips/tcg/translate.h | 5 + hw/mips/cps.c | 4 + hw/mips/fuloong2e.c | 2 +- hw/mips/jazz.c | 2 +- hw/mips/loongson3_virt.c | 2 +- hw/mips/malta.c | 9 +- hw/mips/mipssim.c | 2 +- target/mips/cpu.c | 17 ++- target/mips/tcg/ldst_helper.c | 15 +-- target/mips/tcg/msa_helper.c | 2 +- target/mips/tcg/mxu_translate.c | 18 ++-- target/mips/tcg/sysemu/tlb_helper.c | 2 +- target/mips/tcg/translate.c | 120 +++++++++++----------- target/mips/tcg/tx79_translate.c | 8 +- target/mips/tcg/micromips_translate.c.inc | 22 ++-- target/mips/tcg/mips16e_translate.c.inc | 109 ++++++++++---------- target/mips/tcg/nanomips_translate.c.inc | 32 +++--- 20 files changed, 212 insertions(+), 178 deletions(-) Reviewed-by: Jiaxun Yang Tested-by: Jiaxun Yang