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| 79835 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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798
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
fix some common typos
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-
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2012-05-09
Jim Meyering
Accepted
qga/commands-posix.c: Fix typo in error message
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-
-
2012-05-09
Peter Maydell
Superseded
[for-1.1] user-exec.c: Don't assert on segfaults for non-valid addresses
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2012-05-03
Peter Maydell
Accepted
[9/9] hw/armv7m_nvic: Make the NVIC a freestanding class
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-
-
2012-05-02
Peter Maydell
Accepted
[8/9] hw/arm_gic: Move CPU interface memory region setup into arm_gic_init
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2012-05-02
Peter Maydell
Accepted
[7/9] hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting
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2012-05-02
Peter Maydell
Accepted
[6/9] hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor
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2012-05-02
Peter Maydell
Accepted
[5/9] hw/arm_gic: Add qdev property for GIC revision
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2012-05-02
Peter Maydell
Accepted
[4/9] hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers
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2012-05-02
Peter Maydell
Accepted
[3/9] hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset
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2012-05-02
Peter Maydell
Accepted
[2/9] hw/arm_gic: Remove the special casing of NCPU for the NVIC
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-
2012-05-02
Peter Maydell
Accepted
[1/9] hw/arm_gic: Remove NVIC ifdefs from gic_state struct
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-
-
2012-05-02
Peter Maydell
Accepted
[for-1.1] linux-user: fix emulation of /proc/self/maps
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-
-
2012-05-01
Peter Maydell
Accepted
target-arm: Make SETEND respect bswap_code (BE8) setting
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-
-
2012-04-24
Peter Maydell
Accepted
[32/32] target-arm: Remove ARM_CPUID_* macros
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-
-
2012-04-15
Peter Maydell
Superseded
[31/32] target-arm: Remove remaining old cp15 infrastructure
-
-
-
2012-04-15
Peter Maydell
Superseded
[30/32] target-arm: Move block cache ops to new cp15 framework
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-
-
2012-04-15
Peter Maydell
Superseded
[29/32] target-arm: Remove c0_cachetype CPUARMState field
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-
-
2012-04-15
Peter Maydell
Superseded
[28/32] target-arm: Convert final ID registers
-
-
-
2012-04-15
Peter Maydell
Superseded
[27/32] target-arm: Convert MPIDR
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-
-
2012-04-15
Peter Maydell
Superseded
[26/32] target-arm: Convert cp15 cache ID registers
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-
-
2012-04-15
Peter Maydell
Superseded
[25/32] target-arm: Convert cp15 crn=0 crm={1,2} feature registers
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-
-
2012-04-15
Peter Maydell
Superseded
[24/32] target-arm: Convert cp15 crn=1 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[23/32] target-arm: Convert cp15 crn=9 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[22/32] target-arm: Convert cp15 crn=6 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[21/32] target-arm: convert cp15 crn=7 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[20/32] target-arm: Convert cp15 VA-PA translation registers
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-
-
2012-04-15
Peter Maydell
Superseded
[19/32] target-arm: Convert cp15 MMU TLB control
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-
-
2012-04-15
Peter Maydell
Superseded
[18/32] target-arm: Convert cp15 crn=15 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[17/32] target-arm: Convert cp15 crn=10 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[16/32] target-arm: Convert cp15 crn=13 registers
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-
2012-04-15
Peter Maydell
Superseded
[15/32] target-arm: Convert cp15 crn=2 registers
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-
2012-04-15
Peter Maydell
Superseded
[14/32] target-arm: Convert MMU fault status cp15 registers
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-
-
2012-04-15
Peter Maydell
Superseded
[13/32] target-arm: Convert cp15 c3 register
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-
2012-04-15
Peter Maydell
Superseded
[12/32] target-arm: Convert generic timer cp15 regs
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-
-
2012-04-15
Peter Maydell
Superseded
[11/32] target-arm: Convert performance monitor registers
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-
2012-04-15
Peter Maydell
Superseded
[10/32] target-arm: Convert TLS registers
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-
-
2012-04-15
Peter Maydell
Superseded
[09/32] target-arm: Convert WFI/barriers special cases to cp_reginfo
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-
-
2012-04-15
Peter Maydell
Superseded
[08/32] target-arm: Convert TEECR, TEEHBR to new scheme
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-
-
2012-04-15
Peter Maydell
Superseded
[07/32] target-arm: Convert debug registers to cp_reginfo
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-
-
2012-04-15
Peter Maydell
Superseded
[06/32] target-arm: Add register_cp_regs_for_features()
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-
-
2012-04-15
Peter Maydell
Superseded
[05/32] target-arm: Remove old cpu_arm_set_cp_io infrastructure
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-
-
2012-04-15
Peter Maydell
Superseded
[04/32] hw/pxa2xx_pic: Convert coprocessor registers to new scheme
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-
-
2012-04-15
Peter Maydell
Superseded
[03/32] hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs
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-
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2012-04-15
Peter Maydell
Superseded
[02/32] hw/pxa2xx: Convert cp14 perf registers to new scheme
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-
-
2012-04-15
Peter Maydell
Superseded
[01/32] target-arm: initial coprocessor register framework
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-
-
2012-04-15
Peter Maydell
Superseded
[v2,14/14] target-arm: Move A9 config_base_address reset value to ARMCPU
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-
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2012-04-14
Peter Maydell
Accepted
[v2,13/14] target-arm: Move reset handling to arm_cpu_reset
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2012-04-14
Peter Maydell
Accepted
[v2,12/14] target-arm: Drop cpu_reset_model_id()
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2012-04-14
Peter Maydell
Accepted
[v2,11/14] target-arm: Move cache ID register setup to cpu specific init fns
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-
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2012-04-14
Peter Maydell
Accepted
[v2,10/14] target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
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2012-04-14
Peter Maydell
Accepted
[v2,09/14] target-arm: Move feature register setup to per-CPU init fns
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,08/14] target-arm: Move iWMMXT wCID reset to cpu_state_reset
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,07/14] target-arm: Drop JTAG_ID documentation
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,06/14] target-arm: Move SCTLR reset value setup to per cpu init fns
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,05/14] target-arm: Move CTR setup to per cpu init fns
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2012-04-14
Peter Maydell
Accepted
[v2,04/14] target-arm: Move MVFR* setup to per cpu init fns
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,03/14] target-arm: Move FPSID config to cpu init fns
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,02/14] target-arm: Move feature bit settings to CPU init fns
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-
-
2012-04-14
Peter Maydell
Accepted
[v2,01/14] target-arm: Add QOM subclasses for each ARM cpu implementation
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-
-
2012-04-14
Peter Maydell
Accepted
configure: Insist on a Python 2, not Python 3
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-
-
2012-04-12
Peter Maydell
Accepted
[v2] bsd-user: fix compile failure
-
-
-
2012-04-12
Peter Maydell
Accepted
hw/arm_mptimer: Reset the qemu_timer at reset
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-
-
2012-04-12
Peter Maydell
Accepted
bsd-user: fix compile failure
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-
-
2012-04-12
Peter Maydell
Superseded
[v2,2/2] softfloat: roundAndPackInt{32,64}: Don't assume int32 is 32 bits
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-
-
2012-04-05
Peter Maydell
Accepted
[v2,1/2] softfloat: float*_to_int32_round_to_zero: don't assume int32 is 32 bits
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-
-
2012-04-05
Peter Maydell
Accepted
configure: Remove useless uses of ARCH_CFLAGS
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-
-
2012-04-04
Peter Maydell
Accepted
[13/13] hw/arm_gic.c: Remove stray hardcoded tab
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-
-
2012-04-04
Peter Maydell
Accepted
[12/13] hw/arm_gic.c: gic_set_pending_private() is NVIC only
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-
-
2012-04-04
Peter Maydell
Accepted
[11/13] hw/arm_gic.c: Use NVIC instead of LEGACY_INCLUDED_GIC define
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-
-
2012-04-04
Peter Maydell
Accepted
[10/13] hw/arm_gic: Make gic_reset a sysbus reset function
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-
2012-04-04
Peter Maydell
Accepted
[09/13] hw/arm11mpcore: Convert to using sysbus GIC device
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2012-04-04
Peter Maydell
Accepted
[08/13] hw/exynos4210_gic.c: Convert to using sysbus GIC
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-
2012-04-04
Peter Maydell
Accepted
[07/13] hw/realview_gic: switch to sysbus GIC
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-
-
2012-04-04
Peter Maydell
Accepted
[06/13] hw/a9mpcore.c: Switch to using sysbus GIC
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-
-
2012-04-04
Peter Maydell
Accepted
[05/13] hw/a15mpcore: switch to using sysbus GIC
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-
-
2012-04-04
Peter Maydell
Accepted
[04/13] arm_gic: Make the GIC its own sysbus device
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-
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2012-04-04
Peter Maydell
Accepted
[03/13] hw/arm_gic.c: Expose PPI inputs as gpio inputs
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-
-
2012-04-04
Peter Maydell
Superseded
[02/13] hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
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-
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2012-04-04
Peter Maydell
Accepted
[01/13] hw/arm_gic: Move NCPU definition to arm_gic.c
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-
-
2012-04-04
Peter Maydell
Accepted
[v2,2/2] Userspace ARM BE8 support
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2012-03-30
Peter Maydell
Accepted
[v2,1/2] elf.h: Update EF_ARM_ constants to newer ABI versions
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-
2012-03-30
Peter Maydell
Accepted
[14/14] target-arm: Move A9 config_base_address reset value to ARMCPU
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2012-03-30
Peter Maydell
Superseded
[13/14] target-arm: Move reset handling to arm_cpu_reset
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-
-
2012-03-30
Peter Maydell
Superseded
[12/14] target-arm: Drop cpu_reset_model_id()
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-
-
2012-03-30
Peter Maydell
Superseded
[11/14] target-arm: Move cache ID register setup to cpu specific init fns
-
-
-
2012-03-30
Peter Maydell
Superseded
[10/14] target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
-
-
-
2012-03-30
Peter Maydell
Superseded
[09/14] target-arm: Move feature register setup to per-CPU init fns
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-
-
2012-03-30
Peter Maydell
Superseded
[08/14] target-arm: Move iWMMXT wCID reset to cpu_state_reset
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-
-
2012-03-30
Peter Maydell
Superseded
[07/14] target-arm: Drop JTAG_ID documentation
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-
-
2012-03-30
Peter Maydell
Superseded
[06/14] target-arm: Move SCTLR reset value setup to per cpu init fns
-
-
-
2012-03-30
Peter Maydell
Superseded
[05/14] target-arm: Move CTR setup to per cpu init fns
-
-
-
2012-03-30
Peter Maydell
Superseded
[04/14] target-arm: Move MVFR* setup to per cpu init fns
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-
-
2012-03-30
Peter Maydell
Superseded
[03/14] target-arm: Move FPSID config to cpu init fns
-
-
-
2012-03-30
Peter Maydell
Superseded
[02/14] target-arm: Move feature bit settings to CPU init fns
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-
2012-03-30
Peter Maydell
Superseded
[01/14] target-arm: Add QOM subclasses for each ARM cpu implementation
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-
2012-03-30
Peter Maydell
Superseded
qerror: Add QERR_PROPERTY_SET_AFTER_REALIZE
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2012-03-26
Peter Maydell
Superseded
linux-user/arm/syscall_nr.h: Add syscall number for ppoll
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2012-03-16
Peter Maydell
Accepted
hw/qxl.c: Fix compilation failures on 32 bit hosts
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2012-03-16
Peter Maydell
Accepted
target-arm: Decode SETEND correctly in Thumb
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2012-03-13
Peter Maydell
Accepted
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793
794
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798
799
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