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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id m6si5897999qay.241.2014.05.12.05.42.46 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 12 May 2014 05:42:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:37482 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WjpZ8-0007Kf-67 for patch@linaro.org; Mon, 12 May 2014 08:42:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44784) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WjpV7-0001Tv-Fg for qemu-devel@nongnu.org; Mon, 12 May 2014 08:38:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WjpV0-0002Tb-9I for qemu-devel@nongnu.org; Mon, 12 May 2014 08:38:37 -0400 Received: from mail-pa0-f47.google.com ([209.85.220.47]:35839) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WjpV0-0002TV-3c for qemu-devel@nongnu.org; Mon, 12 May 2014 08:38:30 -0400 Received: by mail-pa0-f47.google.com with SMTP id lf10so5985680pab.20 for ; Mon, 12 May 2014 05:38:29 -0700 (PDT) X-Received: by 10.66.222.100 with SMTP id ql4mr34708998pac.109.1399898309518; Mon, 12 May 2014 05:38:29 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id ek2sm22718531pbd.30.2014.05.12.05.38.25 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 12 May 2014 05:38:28 -0700 (PDT) From: Pranavkumar Sawargaonkar To: qemu-devel@nongnu.org Date: Mon, 12 May 2014 18:07:25 +0530 Message-Id: <1399898246-4831-8-git-send-email-pranavkumar@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399898246-4831-1-git-send-email-pranavkumar@linaro.org> References: <1399898246-4831-1-git-send-email-pranavkumar@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.220.47 Cc: peter.maydell@linaro.org, Anup Patel , patches@apm.com, robherring2@gmail.com, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, Pranavkumar Sawargaonkar Subject: [Qemu-devel] [RFC PATCH V5 7/8] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: pranavkumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 To implement kvm_arch_reset_vcpu(), we simply re-init the VCPU using kvm_arm_vcpu_init() so that all registers of VCPU are set to their reset values by in-kernel KVM code. Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Anup Patel Reviewed-by: Peter Maydell --- target-arm/kvm64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c index 917d256..6e988f3 100644 --- a/target-arm/kvm64.c +++ b/target-arm/kvm64.c @@ -269,4 +269,8 @@ int kvm_arch_get_registers(CPUState *cs) void kvm_arch_reset_vcpu(CPUState *cs) { + /* Re-init VCPU so that all registers are set to + * their respective reset values. + */ + kvm_arm_vcpu_init(cs); }