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[67.52.129.61]) by mx.google.com with ESMTPSA id h3sm7270163pdl.22.2014.10.30.15.12.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 30 Oct 2014 15:12:40 -0700 (PDT) From: Greg Bellows To: qemu-devel@nongnu.org, peter.maydell@linaro.org, serge.fdrv@gmail.com, edgar.iglesias@gmail.com, aggelerf@ethz.ch, christoffer.dall@linaro.org Date: Thu, 30 Oct 2014 17:11:59 -0500 Message-Id: <1414707132-24588-4-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1414707132-24588-1-git-send-email-greg.bellows@linaro.org> References: <1414707132-24588-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.220.41 Cc: daniel.thompson@linaro.org, Greg Bellows Subject: [Qemu-devel] [PATCH v2 03/16] hw/arm/virt.c: Wire FIQ between CPU <> GIC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: greg.bellows@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Connect FIQ output of the GIC CPU interfaces to the CPUs. Signed-off-by: Greg Bellows --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 78f618d..e8bc059 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -354,6 +354,8 @@ static void create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) qdev_get_gpio_in(gicdev, ppibase + 27)); sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); + sysbus_connect_irq(gicbusdev, i+smp_cpus, qdev_get_gpio_in(cpudev, + ARM_CPU_FIQ)); } for (i = 0; i < NUM_IRQS; i++) {