From patchwork Mon Dec 15 23:09:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Bellows X-Patchwork-Id: 42308 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f72.google.com (mail-wg0-f72.google.com [74.125.82.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C94C426C6C for ; Mon, 15 Dec 2014 23:19:40 +0000 (UTC) Received: by mail-wg0-f72.google.com with SMTP id y19sf7911828wgg.3 for ; Mon, 15 Dec 2014 15:19:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:cc:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=AN++mJOMzDJnKiqx/bWu/zhiR2xHZWJQL3KIKDazZ1o=; b=eHcnmWdkIVzLReJV9rtV8/8PVl84nue5G16TfeJJwTNXD10YWez7rvCnO7wACApuD+ c7tCpbqB/RG7VzWCi9RBIdHYZVIPsiFW/kUeezOTrR83PNO20OO5kybZmbn5UkmSi4u1 DcKk4t6aaoqFYO3hfVRpvHiP4uh93/6Ue3b8ZHNHagvixP7fpFoxmGfJUOg7ptN3+67m 7/6l9SPCnNHPYAL3h/Ev1lclIJKuCX37Y0eA2o78fNilqPY6fdk3k7EP5olYz7MYBUC6 Tb83wWym8BJSK/RuIl2A3kbzDQhdUfNBEF+1EqYSf2KjXTowQziFZWxV15M+0SroLlQC jpCg== X-Gm-Message-State: ALoCoQmMVn35yT59LUWCHwU/nyUBs4gVUCPH6dp6a13x4GmBPiSquMibMojDPed4O7jQ5XBGRnrQ X-Received: by 10.180.98.165 with SMTP id ej5mr3900142wib.1.1418685580116; Mon, 15 Dec 2014 15:19:40 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.205.98 with SMTP id lf2ls740096lac.16.gmail; Mon, 15 Dec 2014 15:19:39 -0800 (PST) X-Received: by 10.152.4.233 with SMTP id n9mr33025399lan.61.1418685579886; Mon, 15 Dec 2014 15:19:39 -0800 (PST) Received: from mail-lb0-f181.google.com (mail-lb0-f181.google.com. [209.85.217.181]) by mx.google.com with ESMTPS id sz9si11815081lbb.91.2014.12.15.15.19.39 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 15 Dec 2014 15:19:39 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.181 as permitted sender) client-ip=209.85.217.181; Received: by mail-lb0-f181.google.com with SMTP id l4so9905116lbv.26 for ; Mon, 15 Dec 2014 15:19:39 -0800 (PST) X-Received: by 10.112.130.132 with SMTP id oe4mr32463239lbb.82.1418685579762; Mon, 15 Dec 2014 15:19:39 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.142.69 with SMTP id ru5csp867770lbb; Mon, 15 Dec 2014 15:19:39 -0800 (PST) X-Received: by 10.224.135.138 with SMTP id n10mr61922539qat.45.1418685578171; Mon, 15 Dec 2014 15:19:38 -0800 (PST) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id m3si10287849qao.39.2014.12.15.15.19.37 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 15 Dec 2014 15:19:38 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:42401 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y0evR-0002HY-6x for patch@linaro.org; Mon, 15 Dec 2014 18:19:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36088) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y0emf-0003tS-A5 for qemu-devel@nongnu.org; Mon, 15 Dec 2014 18:10:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y0ema-0000jt-7h for qemu-devel@nongnu.org; Mon, 15 Dec 2014 18:10:33 -0500 Received: from mail-pd0-f173.google.com ([209.85.192.173]:62627) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y0emZ-0000jp-P3 for qemu-devel@nongnu.org; Mon, 15 Dec 2014 18:10:27 -0500 Received: by mail-pd0-f173.google.com with SMTP id ft15so12558289pdb.18 for ; Mon, 15 Dec 2014 15:10:27 -0800 (PST) X-Received: by 10.70.50.162 with SMTP id d2mr55274399pdo.85.1418685027434; Mon, 15 Dec 2014 15:10:27 -0800 (PST) Received: from gbellows-linaro.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com. [67.52.129.61]) by mx.google.com with ESMTPSA id uq15sm10402467pab.8.2014.12.15.15.10.25 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 15 Dec 2014 15:10:25 -0800 (PST) From: Greg Bellows To: qemu-devel@nongnu.org, serge.fdrv@gmail.com, edgar.iglesias@gmail.com, aggelerf@ethz.ch, peter.maydell@linaro.org Date: Mon, 15 Dec 2014 17:09:52 -0600 Message-Id: <1418684992-8996-16-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1418684992-8996-1-git-send-email-greg.bellows@linaro.org> References: <1418684992-8996-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.173 Cc: Greg Bellows Subject: [Qemu-devel] [PATCH v4 15/15] target-arm: add cpu feature EL3 to CPUs with Security Extensions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: greg.bellows@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Fabian Aggeler Set ARM_FEATURE_EL3 feature for CPUs that implement Security Extensions. Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows Reviewed-by: Peter Maydell --- target-arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 069e090..285947f 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -668,6 +668,7 @@ static void arm1176_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CACHE_DIRTY_REG); set_feature(&cpu->env, ARM_FEATURE_CACHE_BLOCK_OPS); + set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->midr = 0x410fb767; cpu->reset_fpsid = 0x410120b5; cpu->mvfr0 = 0x11111111; @@ -756,6 +757,7 @@ static void cortex_a8_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_NEON); set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); + set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->midr = 0x410fc080; cpu->reset_fpsid = 0x410330c0; cpu->mvfr0 = 0x11110222; @@ -823,6 +825,7 @@ static void cortex_a9_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); set_feature(&cpu->env, ARM_FEATURE_NEON); set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); + set_feature(&cpu->env, ARM_FEATURE_EL3); /* Note that A9 supports the MP extensions even for * A9UP and single-core A9MP (which are both different * and valid configurations; we don't model A9UP). @@ -890,6 +893,7 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); set_feature(&cpu->env, ARM_FEATURE_LPAE); + set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; cpu->midr = 0x412fc0f1; cpu->reset_fpsid = 0x410430f0;