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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id n67si4065836qga.31.2015.02.11.22.52.11 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 11 Feb 2015 22:52:11 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:48738 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YLndC-0001AT-TL for patch@linaro.org; Thu, 12 Feb 2015 01:52:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41057) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YLnad-0005nt-Pi for qemu-devel@nongnu.org; Thu, 12 Feb 2015 01:49:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YLnaZ-0000Oj-2v for qemu-devel@nongnu.org; Thu, 12 Feb 2015 01:49:31 -0500 Received: from mail-ig0-f177.google.com ([209.85.213.177]:51713) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YLnaY-0000Oe-Un for qemu-devel@nongnu.org; Thu, 12 Feb 2015 01:49:27 -0500 Received: by mail-ig0-f177.google.com with SMTP id z20so1839874igj.4 for ; Wed, 11 Feb 2015 22:49:26 -0800 (PST) X-Received: by 10.50.66.243 with SMTP id i19mr2080597igt.7.1423723766430; Wed, 11 Feb 2015 22:49:26 -0800 (PST) Received: from localhost.localdomain ([113.28.134.59]) by mx.google.com with ESMTPSA id b6sm713096igb.15.2015.02.11.22.49.23 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Feb 2015 22:49:25 -0800 (PST) From: Greg Bellows To: qemu-devel@nongnu.org, peter.maydell@linaro.org, christoffer.dall@linaro.org, alex.bennee@linaro.org Date: Thu, 12 Feb 2015 14:49:08 +0800 Message-Id: <1423723750-2544-3-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1423723750-2544-1-git-send-email-greg.bellows@linaro.org> References: <1423723750-2544-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.213.177 Cc: edgar.iglesias@gmail.com, Greg Bellows , a.spyridakis@virtualopensystems.com Subject: [Qemu-devel] [PATCH v7 2/4] target-arm: Add feature parsing to virt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: greg.bellows@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Added machvirt parsing of feature keywords added to the -cpu command line option. Parsing occurs during machine initialization. Signed-off-by: Greg Bellows Reviewed-by: Peter Maydell --- v3 -> v4 - Fix misspelling v1 -> v2 - Fix multiple property handling --- hw/arm/virt.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 34d9379..3c37a5e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -602,15 +602,19 @@ static void machvirt_init(MachineState *machine) MemoryRegion *ram = g_new(MemoryRegion, 1); const char *cpu_model = machine->cpu_model; VirtBoardInfo *vbi; + char **cpustr; if (!cpu_model) { cpu_model = "cortex-a15"; } - vbi = find_machine_info(cpu_model); + /* Separate the actual CPU model name from any appended features */ + cpustr = g_strsplit(cpu_model, ",", 2); + + vbi = find_machine_info(cpustr[0]); if (!vbi) { - error_report("mach-virt: CPU %s not supported", cpu_model); + error_report("mach-virt: CPU %s not supported", cpustr[0]); exit(1); } @@ -624,8 +628,10 @@ static void machvirt_init(MachineState *machine) create_fdt(vbi); for (n = 0; n < smp_cpus; n++) { - ObjectClass *oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model); + ObjectClass *oc = cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]); + CPUClass *cc = CPU_CLASS(oc); Object *cpuobj; + Error *err = NULL; if (!oc) { fprintf(stderr, "Unable to find CPU definition\n"); @@ -633,6 +639,13 @@ static void machvirt_init(MachineState *machine) } cpuobj = object_new(object_class_get_name(oc)); + /* Handle any CPU options specified by the user */ + cc->parse_features(CPU(cpuobj), cpustr[1], &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + if (!vms->secure) { object_property_set_bool(cpuobj, false, "has_el3", NULL); } @@ -652,6 +665,7 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, true, "realized", NULL); } + g_strfreev(cpustr); fdt_add_timer_nodes(vbi); fdt_add_cpu_nodes(vbi); fdt_add_psci_node(vbi);