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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id c63si15737967qhc.27.2016.06.13.10.08.17 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 13 Jun 2016 10:08:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:57868 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVLV-0002lc-Ct for patch@linaro.org; Mon, 13 Jun 2016 13:08:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39038) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVJ5-0001Py-4j for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCVJ0-0001od-04 for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46440) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVIz-0001oX-FE for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:41 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1C3CD85542; Mon, 13 Jun 2016 17:05:41 +0000 (UTC) Received: from localhost (ovpn-112-61.ams2.redhat.com [10.36.112.61]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u5DH5dF5022422; Mon, 13 Jun 2016 13:05:40 -0400 From: Stefan Hajnoczi To: qemu-devel@nongnu.org Date: Mon, 13 Jun 2016 18:05:22 +0100 Message-Id: <1465837535-30067-3-git-send-email-stefanha@redhat.com> In-Reply-To: <1465837535-30067-1-git-send-email-stefanha@redhat.com> References: <1465837535-30067-1-git-send-email-stefanha@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 13 Jun 2016 17:05:41 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 02/15] user-exec: Push resume-from-signal code out to handle_cpu_signal() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Peter Maydell , Fam Zheng , Jeff Cody , mreitz@redhat.com, jjherne@linux.vnet.ibm.com, Paolo Bonzini Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Since the only caller of page_unprotect() which might cause it to need to call cpu_resume_from_signal() is handle_cpu_signal() in the user-mode code, push the longjump handling out to that function. Since this is the only caller of cpu_resume_from_signal() which passes a non-NULL puc argument, split the non-NULL handling into a new cpu_exit_tb_from_sighandler() function. This allows us to merge the softmmu and usermode implementations of the cpu_resume_from_signal() function, which are now identical. Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov Acked-by: Eduardo Habkost Acked-by: Riku Voipio Message-id: 1463494687-25947-3-git-send-email-peter.maydell@linaro.org --- cpu-exec-common.c | 2 +- translate-all.c | 12 ++++++++---- translate-all.h | 2 +- user-exec.c | 41 +++++++++++++++++++++++++++++------------ 4 files changed, 39 insertions(+), 18 deletions(-) -- 2.5.5 diff --git a/cpu-exec-common.c b/cpu-exec-common.c index 132cd03..0cb5b63 100644 --- a/cpu-exec-common.c +++ b/cpu-exec-common.c @@ -29,7 +29,6 @@ CPUState *tcg_current_cpu; /* exit the current TB from a signal handler. The host registers are restored in a state compatible with the CPU emulator */ -#if defined(CONFIG_SOFTMMU) void cpu_resume_from_signal(CPUState *cpu, void *puc) { /* XXX: restore cpu registers saved in host registers */ @@ -38,6 +37,7 @@ void cpu_resume_from_signal(CPUState *cpu, void *puc) siglongjmp(cpu->jmp_env, 1); } +#if defined(CONFIG_SOFTMMU) void cpu_reloading_memory_map(void) { if (qemu_in_vcpu_thread()) { diff --git a/translate-all.c b/translate-all.c index 2285961..ff588f3 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1955,7 +1955,7 @@ int page_check_range(target_ulong start, target_ulong len, int flags) /* unprotect the page if it was put read-only because it contains translated code */ if (!(p->flags & PAGE_WRITE)) { - if (!page_unprotect(addr, 0, NULL)) { + if (!page_unprotect(addr, 0)) { return -1; } } @@ -1965,8 +1965,12 @@ int page_check_range(target_ulong start, target_ulong len, int flags) } /* called from signal handler: invalidate the code and unprotect the - page. Return TRUE if the fault was successfully handled. */ -int page_unprotect(target_ulong address, uintptr_t pc, void *puc) + * page. Return 0 if the fault was not handled, 1 if it was handled, + * and 2 if it was handled but the caller must cause the TB to be + * immediately exited. (We can only return 2 if the 'pc' argument is + * non-zero.) + */ +int page_unprotect(target_ulong address, uintptr_t pc) { unsigned int prot; PageDesc *p; @@ -1999,7 +2003,7 @@ int page_unprotect(target_ulong address, uintptr_t pc, void *puc) the corresponding translated code. */ if (tb_invalidate_phys_page(addr, pc)) { mmap_unlock(); - cpu_resume_from_signal(current_cpu, puc); + return 2; } #ifdef DEBUG_TB_CHECK tb_invalidate_check(addr); diff --git a/translate-all.h b/translate-all.h index 0384640..ce6071b 100644 --- a/translate-all.h +++ b/translate-all.h @@ -27,7 +27,7 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end); void tb_check_watchpoint(CPUState *cpu); #ifdef CONFIG_USER_ONLY -int page_unprotect(target_ulong address, uintptr_t pc, void *puc); +int page_unprotect(target_ulong address, uintptr_t pc); #endif #endif /* TRANSLATE_ALL_H */ diff --git a/user-exec.c b/user-exec.c index c809daa..efd34a6 100644 --- a/user-exec.c +++ b/user-exec.c @@ -55,7 +55,7 @@ static void exception_action(CPUState *cpu) /* exit the current TB from a signal handler. The host registers are restored in a state compatible with the CPU emulator */ -void cpu_resume_from_signal(CPUState *cpu, void *puc) +static void cpu_exit_tb_from_sighandler(CPUState *cpu, void *puc) { #ifdef __linux__ struct ucontext *uc = puc; @@ -63,20 +63,18 @@ void cpu_resume_from_signal(CPUState *cpu, void *puc) struct sigcontext *uc = puc; #endif - if (puc) { - /* XXX: use siglongjmp ? */ + /* XXX: use siglongjmp ? */ #ifdef __linux__ #ifdef __ia64 - sigprocmask(SIG_SETMASK, (sigset_t *)&uc->uc_sigmask, NULL); + sigprocmask(SIG_SETMASK, (sigset_t *)&uc->uc_sigmask, NULL); #else - sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); + sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); #endif #elif defined(__OpenBSD__) - sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL); + sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL); #endif - } - cpu->exception_index = -1; - siglongjmp(cpu->jmp_env, 1); + + cpu_resume_from_signal(cpu, NULL); } /* 'pc' is the host PC at which the exception was raised. 'address' is @@ -96,9 +94,28 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned long address, pc, address, is_write, *(unsigned long *)old_set); #endif /* XXX: locking issue */ - if (is_write && h2g_valid(address) - && page_unprotect(h2g(address), pc, puc)) { - return 1; + if (is_write && h2g_valid(address)) { + switch (page_unprotect(h2g(address), pc)) { + case 0: + /* Fault not caused by a page marked unwritable to protect + * cached translations, must be the guest binary's problem + */ + break; + case 1: + /* Fault caused by protection of cached translation; TBs + * invalidated, so resume execution + */ + return 1; + case 2: + /* Fault caused by protection of cached translation, and the + * currently executing TB was modified and must be exited + * immediately. + */ + cpu_exit_tb_from_sighandler(current_cpu, puc); + g_assert_not_reached(); + default: + g_assert_not_reached(); + } } /* Convert forcefully to guest address space, invalid addresses