From patchwork Wed Oct 28 04:17:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chen huacai X-Patchwork-Id: 311519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.3 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_INVALID, DKIM_SIGNED, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82D79C388F7 for ; Wed, 28 Oct 2020 04:19:36 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F37E22076C for ; Wed, 28 Oct 2020 04:19:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SMKYuOzA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F37E22076C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:37606 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXcvu-0001Xv-VA for qemu-devel@archiver.kernel.org; Wed, 28 Oct 2020 00:19:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43230) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXcuJ-0000Av-Co for qemu-devel@nongnu.org; Wed, 28 Oct 2020 00:17:55 -0400 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:42979) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kXcuH-0007Cc-FG for qemu-devel@nongnu.org; Wed, 28 Oct 2020 00:17:55 -0400 Received: by mail-pf1-x442.google.com with SMTP id x13so2166092pfa.9 for ; Tue, 27 Oct 2020 21:17:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4mqcm/qscydasRVS0/uiBGxQMYSJ1QP1CS0Djhkp5ck=; b=SMKYuOzAKkNQU1bCDbIlalcZrHENaIjFDyWeUdLgLw5jnkPHtyz0Y4yNkxwXdQJCug 1M2u8RBCL2qjokaX3l1SC38bGjoA6bNHZpuENLcBf2Uj2PNLZLiGn+mj1O6ymIXQ8fKg SjVPiMujJ5oclw/SQ8f2i2MyKEPbCm6/0IsZL+XnCEzywlLtjURHDQAmXq6BYTHt9MvW ePCaGVqK/CilaV/cMsuBx4QFuKip/JgHUqSxpFd6utC+mlApEyuxEvI0EWzUxpsRKqK2 SVWEV6pCPABQAh13vOR7fHmDTH+6Ty9DwQWNHsZPtJsdNtCySEkSqsG3K6S07JyitPnc hPzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4mqcm/qscydasRVS0/uiBGxQMYSJ1QP1CS0Djhkp5ck=; b=JlIMnT2iVW2tqMlFAagBJ8SXFHC0R8SRQtDClLyIkK8QnnvRx5T/QtoHY1w56r++1Q 1naH7BmO/a4oWq3A6RuxF53oVuvfpwIFZMWk4ht3OrENwELvHlH63bzi5ZuWTclVkpfH S/BwGsvrQyBs92GDD8QizyCYMLPiCKRqB25Qa5Hh6UxqRs0b1+sJEwtV5qW4Wc1SsfYB c7cjawBsF9ZQAI/q3aaYEjTfvCknWJDdizQNDhuXxbJeeIst6JOc2m1JYPUauDVnYASB DdJLeEZz3ZLYrI9Am0D3g9ZfJXRoHQ0NbKWnCv/xzSzE/WTxl0K4kEaM0W1RszzDGVUw 3SxA== X-Gm-Message-State: AOAM531O+NwYG6NkLokZnklbYICYah0MrhLN+eFf/PlBcL9kkyecJM2R SdSO6ihykOHKmInC4hXRUmc= X-Google-Smtp-Source: ABdhPJw6Li5XbgWy+2IhA5u60C67ktUqfMg3sBOs9oIMkp0iM9X/9qACJWry2aHAjcN0HI26pIWEOg== X-Received: by 2002:a63:b516:: with SMTP id y22mr4679818pge.154.1603858671998; Tue, 27 Oct 2020 21:17:51 -0700 (PDT) Received: from software.domain.org ([45.77.13.216]) by smtp.gmail.com with ESMTPSA id x10sm3882040pfc.88.2020.10.27.21.17.47 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Oct 2020 21:17:51 -0700 (PDT) From: Huacai Chen X-Google-Original-From: Huacai Chen To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic Subject: [PATCH V15 1/6] target/mips: Fix PageMask with variable page size Date: Wed, 28 Oct 2020 12:17:59 +0800 Message-Id: <1603858685-30701-2-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1603858685-30701-1-git-send-email-chenhc@lemote.com> References: <1603858685-30701-1-git-send-email-chenhc@lemote.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::442; envelope-from=zltjiangshi@gmail.com; helo=mail-pf1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Huacai Chen , qemu-devel@nongnu.org, Jiaxun Yang , Huacai Chen , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Jiaxun Yang Our current code assumed the target page size is always 4k when handling PageMask and VPN2, however, variable page size was just added to mips target and that's no longer true. Fixes: ee3863b9d414 ("target/mips: Support variable page size") Signed-off-by: Jiaxun Yang Signed-off-by: Huacai Chen --- target/mips/cp0_helper.c | 36 +++++++++++++++++++++++++++++------- target/mips/cpu.h | 1 + 2 files changed, 30 insertions(+), 7 deletions(-) diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index 12143ac..d90ddd9 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -892,13 +892,35 @@ void helper_mtc0_memorymapid(CPUMIPSState *env, target_ulong arg1) void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) { - uint64_t mask = arg1 >> (TARGET_PAGE_BITS + 1); - if (!(env->insn_flags & ISA_MIPS32R6) || (arg1 == ~0) || - (mask == 0x0000 || mask == 0x0003 || mask == 0x000F || - mask == 0x003F || mask == 0x00FF || mask == 0x03FF || - mask == 0x0FFF || mask == 0x3FFF || mask == 0xFFFF)) { - env->CP0_PageMask = arg1 & (0x1FFFFFFF & (TARGET_PAGE_MASK << 1)); + unsigned long mask; + int maskbits; + + if (env->insn_flags & ISA_MIPS32R6) { + return; + } + /* Don't care MASKX as we don't support 1KB page */ + mask = extract32((uint32_t)arg1, CP0PM_MASK, 16); + maskbits = find_first_zero_bit(&mask, 32); + + /* Ensure no more set bit after first zero */ + if (mask >> maskbits) { + goto invalid; + } + /* We don't support VTLB entry smaller than target page */ + if ((maskbits + 12) < TARGET_PAGE_BITS) { + goto invalid; } + env->CP0_PageMask = mask << CP0PM_MASK; + + return; + +invalid: + /* + * When invalid, ensure the value is bigger than or equal to + * the minimal but smaller than or equal to the maxium. + */ + maskbits = MIN(16, MAX(maskbits, TARGET_PAGE_BITS - 12)); + env->CP0_PageMask = ((1 << (16 + 1)) - 1) << CP0PM_MASK; } void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index d41579d..23f8c6f 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -619,6 +619,7 @@ struct CPUMIPSState { * CP0 Register 5 */ int32_t CP0_PageMask; +#define CP0PM_MASK 13 int32_t CP0_PageGrain_rw_bitmask; int32_t CP0_PageGrain; #define CP0PG_RIE 31