| Message ID | 20170127103922.19658-5-alex.bennee@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Remaining MTTCG Base patches and ARM enablement | expand |
Alex Bennée writes: > We'll be using the memory ordering definitions to define values for > both the host and guest. To avoid fighting with circular header > dependencies just move these types into their own minimal header. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > Reviewed-by: Richard Henderson <rth@twiddle.net> > --- > tcg/tcg-mo.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ > tcg/tcg.h | 18 +----------------- > 2 files changed, 46 insertions(+), 17 deletions(-) > create mode 100644 tcg/tcg-mo.h > > diff --git a/tcg/tcg-mo.h b/tcg/tcg-mo.h > new file mode 100644 > index 0000000000..429b022561 > --- /dev/null > +++ b/tcg/tcg-mo.h > @@ -0,0 +1,45 @@ > +/* > + * Tiny Code Generator for QEMU > + * > + * Copyright (c) 2008 Fabrice Bellard > + * > + * Permission is hereby granted, free of charge, to any person obtaining a copy > + * of this software and associated documentation files (the "Software"), to deal > + * in the Software without restriction, including without limitation the rights > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell > + * copies of the Software, and to permit persons to whom the Software is > + * furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN > + * THE SOFTWARE. > + */ > + > +#ifndef TCG_MO_H > +#define TCG_MO_H > + > +typedef enum { > + /* Used to indicate the type of accesses on which ordering > + is to be ensured. Modeled after SPARC barriers. */ > + TCG_MO_LD_LD = 0x01, > + TCG_MO_ST_LD = 0x02, > + TCG_MO_LD_ST = 0x04, > + TCG_MO_ST_ST = 0x08, > + TCG_MO_ALL = 0x0F, /* OR of the above */ > + > + /* Used to indicate the kind of ordering which is to be ensured by the > + instruction. These types are derived from x86/aarch64 instructions. > + It should be noted that these are different from C11 semantics. */ > + TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */ > + TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */ > + TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */ > +} TCGBar; > + > +#endif /* TCG_MO_H */ > diff --git a/tcg/tcg.h b/tcg/tcg.h > index 631c6f69b1..f946452049 100644 > --- a/tcg/tcg.h > +++ b/tcg/tcg.h > @@ -29,6 +29,7 @@ > #include "cpu.h" > #include "exec/tb-context.h" > #include "qemu/bitops.h" > +#include "tcg-mo.h" > #include "tcg-target.h" > > /* XXX: make safe guess about sizes */ > @@ -498,23 +499,6 @@ static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t) > #define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) > #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) > > -typedef enum { > - /* Used to indicate the type of accesses on which ordering > - is to be ensured. Modeled after SPARC barriers. */ > - TCG_MO_LD_LD = 0x01, > - TCG_MO_ST_LD = 0x02, > - TCG_MO_LD_ST = 0x04, > - TCG_MO_ST_ST = 0x08, > - TCG_MO_ALL = 0x0F, /* OR of the above */ Can you please add the following comment: This is of the form TCG_MO_A_B where A is before B in program order. Thanks, -- Pranith
Pranith Kumar <bobby.prani@gmail.com> writes: > Alex Bennée writes: > >> We'll be using the memory ordering definitions to define values for >> both the host and guest. To avoid fighting with circular header >> dependencies just move these types into their own minimal header. >> >> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> >> Reviewed-by: Richard Henderson <rth@twiddle.net> >> --- >> tcg/tcg-mo.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ >> tcg/tcg.h | 18 +----------------- >> 2 files changed, 46 insertions(+), 17 deletions(-) >> create mode 100644 tcg/tcg-mo.h >> >> diff --git a/tcg/tcg-mo.h b/tcg/tcg-mo.h >> new file mode 100644 >> index 0000000000..429b022561 >> --- /dev/null >> +++ b/tcg/tcg-mo.h >> @@ -0,0 +1,45 @@ >> +/* >> + * Tiny Code Generator for QEMU >> + * >> + * Copyright (c) 2008 Fabrice Bellard >> + * >> + * Permission is hereby granted, free of charge, to any person obtaining a copy >> + * of this software and associated documentation files (the "Software"), to deal >> + * in the Software without restriction, including without limitation the rights >> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell >> + * copies of the Software, and to permit persons to whom the Software is >> + * furnished to do so, subject to the following conditions: >> + * >> + * The above copyright notice and this permission notice shall be included in >> + * all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR >> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, >> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL >> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER >> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, >> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN >> + * THE SOFTWARE. >> + */ >> + >> +#ifndef TCG_MO_H >> +#define TCG_MO_H >> + >> +typedef enum { >> + /* Used to indicate the type of accesses on which ordering >> + is to be ensured. Modeled after SPARC barriers. */ >> + TCG_MO_LD_LD = 0x01, >> + TCG_MO_ST_LD = 0x02, >> + TCG_MO_LD_ST = 0x04, >> + TCG_MO_ST_ST = 0x08, >> + TCG_MO_ALL = 0x0F, /* OR of the above */ >> + >> + /* Used to indicate the kind of ordering which is to be ensured by the >> + instruction. These types are derived from x86/aarch64 instructions. >> + It should be noted that these are different from C11 semantics. */ >> + TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */ >> + TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */ >> + TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */ >> +} TCGBar; >> + >> +#endif /* TCG_MO_H */ >> diff --git a/tcg/tcg.h b/tcg/tcg.h >> index 631c6f69b1..f946452049 100644 >> --- a/tcg/tcg.h >> +++ b/tcg/tcg.h >> @@ -29,6 +29,7 @@ >> #include "cpu.h" >> #include "exec/tb-context.h" >> #include "qemu/bitops.h" >> +#include "tcg-mo.h" >> #include "tcg-target.h" >> >> /* XXX: make safe guess about sizes */ >> @@ -498,23 +499,6 @@ static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t) >> #define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) >> #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) >> >> -typedef enum { >> - /* Used to indicate the type of accesses on which ordering >> - is to be ensured. Modeled after SPARC barriers. */ >> - TCG_MO_LD_LD = 0x01, >> - TCG_MO_ST_LD = 0x02, >> - TCG_MO_LD_ST = 0x04, >> - TCG_MO_ST_ST = 0x08, >> - TCG_MO_ALL = 0x0F, /* OR of the above */ > > Can you please add the following comment: > > This is of the form TCG_MO_A_B where A is before B in program order. Good idea. Will do. -- Alex Bennée
diff --git a/tcg/tcg-mo.h b/tcg/tcg-mo.h new file mode 100644 index 0000000000..429b022561 --- /dev/null +++ b/tcg/tcg-mo.h @@ -0,0 +1,45 @@ +/* + * Tiny Code Generator for QEMU + * + * Copyright (c) 2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef TCG_MO_H +#define TCG_MO_H + +typedef enum { + /* Used to indicate the type of accesses on which ordering + is to be ensured. Modeled after SPARC barriers. */ + TCG_MO_LD_LD = 0x01, + TCG_MO_ST_LD = 0x02, + TCG_MO_LD_ST = 0x04, + TCG_MO_ST_ST = 0x08, + TCG_MO_ALL = 0x0F, /* OR of the above */ + + /* Used to indicate the kind of ordering which is to be ensured by the + instruction. These types are derived from x86/aarch64 instructions. + It should be noted that these are different from C11 semantics. */ + TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */ + TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */ + TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */ +} TCGBar; + +#endif /* TCG_MO_H */ diff --git a/tcg/tcg.h b/tcg/tcg.h index 631c6f69b1..f946452049 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -29,6 +29,7 @@ #include "cpu.h" #include "exec/tb-context.h" #include "qemu/bitops.h" +#include "tcg-mo.h" #include "tcg-target.h" /* XXX: make safe guess about sizes */ @@ -498,23 +499,6 @@ static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t) #define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) -typedef enum { - /* Used to indicate the type of accesses on which ordering - is to be ensured. Modeled after SPARC barriers. */ - TCG_MO_LD_LD = 0x01, - TCG_MO_ST_LD = 0x02, - TCG_MO_LD_ST = 0x04, - TCG_MO_ST_ST = 0x08, - TCG_MO_ALL = 0x0F, /* OR of the above */ - - /* Used to indicate the kind of ordering which is to be ensured by the - instruction. These types are derived from x86/aarch64 instructions. - It should be noted that these are different from C11 semantics. */ - TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */ - TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */ - TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */ -} TCGBar; - /* Conditions. Note that these are laid out for easy manipulation by the functions below: bit 0 is used for inverting;