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[RFC,for,2.11,19/23] fpu/softfloat2a: implement float16_abs helper

Message ID 20170720150426.12393-20-alex.bennee@linaro.org
State Superseded
Headers show
Series Implementing FP16 for ARMv8.2 using SoftFloat2a and 3c | expand

Commit Message

Alex Bennée July 20, 2017, 3:04 p.m. UTC 
This will be required when expanding the MINMAX() macro for 16
bit/half-precision operations.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
 include/fpu/softfloat2a/softfloat.h | 7 +++++++
 1 file changed, 7 insertions(+)

-- 
2.13.0
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Patch

diff --git a/include/fpu/softfloat2a/softfloat.h b/include/fpu/softfloat2a/softfloat.h
index a274dc7419..3cb41977d8 100644
--- a/include/fpu/softfloat2a/softfloat.h
+++ b/include/fpu/softfloat2a/softfloat.h
@@ -379,6 +379,13 @@  static inline int float16_is_zero_or_denormal(float16 a)
     return (float16_val(a) & 0x7c00) == 0;
 }
 
+static inline float16 float16_abs(float16 a)
+{
+    /* Note that abs does *not* handle NaN specially, nor does
+     * it flush denormal inputs to zero.
+     */
+    return make_float16(float16_val(a) & 0x7fff);
+}
 /*----------------------------------------------------------------------------
 | The pattern for a default generated half-precision NaN.
 *----------------------------------------------------------------------------*/