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[97.126.108.236]) by smtp.gmail.com with ESMTPSA id t65sm262863pfk.59.2017.09.06.09.06.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 06 Sep 2017 09:06:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 6 Sep 2017 09:05:52 -0700 Message-Id: <20170906160612.22769-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170906160612.22769-1-richard.henderson@linaro.org> References: <20170906160612.22769-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::22d Subject: [Qemu-devel] [PULL 12/32] target/i386: [tcg] Port to tb_stop X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?utf-8?q?Llu=C3=ADs_Vilanova?= , Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Lluís Vilanova Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova Reviewed-by: Emilio G. Cota Reviewed-by: Richard Henderson Message-Id: <150002219289.22386.17959138704858928730.stgit@frigg.lan> Signed-off-by: Richard Henderson --- target/i386/translate.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) -- 2.13.5 diff --git a/target/i386/translate.c b/target/i386/translate.c index 0f38896f17..9872f84a03 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8488,8 +8488,6 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) /* if irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear the flag and abort the translation to give the irqs a chance to happen */ - gen_jmp_im(pc_next - dc->cs_base); - gen_eob(dc); dc->base.is_jmp = DISAS_TOO_MANY; } else if ((dc->base.tb->cflags & CF_USE_ICOUNT) && ((dc->base.pc_next & TARGET_PAGE_MASK) @@ -8502,18 +8500,24 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) If current instruction already crossed the bound - it's ok, because an exception hasn't stopped this code. */ - gen_jmp_im(pc_next - dc->cs_base); - gen_eob(dc); dc->base.is_jmp = DISAS_TOO_MANY; } else if ((pc_next - dc->base.pc_first) >= (TARGET_PAGE_SIZE - 32)) { - gen_jmp_im(pc_next - dc->cs_base); - gen_eob(dc); dc->base.is_jmp = DISAS_TOO_MANY; } dc->base.pc_next = pc_next; } +static void i386_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + if (dc->base.is_jmp == DISAS_TOO_MANY) { + gen_jmp_im(dc->base.pc_next - dc->cs_base); + gen_eob(dc); + } +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) { @@ -8570,23 +8574,21 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) /* if single step mode, we generate only one instruction and generate an exception */ if (dc->base.singlestep_enabled) { - gen_jmp_im(dc->base.pc_next - dc->cs_base); - gen_eob(dc); + dc->base.is_jmp = DISAS_TOO_MANY; break; } /* if too long translation, stop generation too */ if (tcg_op_buf_full() || num_insns >= max_insns) { - gen_jmp_im(dc->base.pc_next - dc->cs_base); - gen_eob(dc); + dc->base.is_jmp = DISAS_TOO_MANY; break; } if (singlestep) { - gen_jmp_im(dc->base.pc_next - dc->cs_base); - gen_eob(dc); + dc->base.is_jmp = DISAS_TOO_MANY; break; } } + i386_tr_tb_stop(&dc->base, cs); if (tb->cflags & CF_LAST_IO) gen_io_end(); gen_tb_end(tb, num_insns);