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[174.21.6.47]) by smtp.gmail.com with ESMTPSA id z125sm182023pfz.27.2018.01.21.19.42.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 21 Jan 2018 19:42:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 21 Jan 2018 19:41:57 -0800 Message-Id: <20180122034217.19593-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180122034217.19593-1-richard.henderson@linaro.org> References: <20180122034217.19593-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PULL 23/43] target/hppa: Implement LDWA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/hppa/translate.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.14.3 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 44e566837d..5b49cc5332 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2943,12 +2943,50 @@ static DisasJumpType trans_stby(DisasContext *ctx, uint32_t insn, return nullify_end(ctx, DISAS_NEXT); } +#ifndef CONFIG_USER_ONLY +static DisasJumpType trans_ldwa_idx_i(DisasContext *ctx, uint32_t insn, + const DisasInsn *di) +{ + int hold_mmu_idx = ctx->mmu_idx; + DisasJumpType ret; + + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + + /* ??? needs fixing for hppa64 -- ldda does not follow the same + format wrt the sub-opcode in bits 6:9. */ + ctx->mmu_idx = MMU_PHYS_IDX; + ret = trans_ld_idx_i(ctx, insn, di); + ctx->mmu_idx = hold_mmu_idx; + return ret; +} + +static DisasJumpType trans_ldwa_idx_x(DisasContext *ctx, uint32_t insn, + const DisasInsn *di) +{ + int hold_mmu_idx = ctx->mmu_idx; + DisasJumpType ret; + + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + + /* ??? needs fixing for hppa64 -- ldda does not follow the same + format wrt the sub-opcode in bits 6:9. */ + ctx->mmu_idx = MMU_PHYS_IDX; + ret = trans_ld_idx_x(ctx, insn, di); + ctx->mmu_idx = hold_mmu_idx; + return ret; +} +#endif + static const DisasInsn table_index_mem[] = { { 0x0c001000u, 0xfc001300, trans_ld_idx_i }, /* LD[BHWD], im */ { 0x0c000000u, 0xfc001300, trans_ld_idx_x }, /* LD[BHWD], rx */ { 0x0c001200u, 0xfc001300, trans_st_idx_i }, /* ST[BHWD] */ { 0x0c0001c0u, 0xfc0003c0, trans_ldcw }, { 0x0c001300u, 0xfc0013c0, trans_stby }, +#ifndef CONFIG_USER_ONLY + { 0x0c001180u, 0xfc00d3c0, trans_ldwa_idx_i }, /* LDWA, im */ + { 0x0c000180u, 0xfc00d3c0, trans_ldwa_idx_x }, /* LDWA, rx */ +#endif }; static DisasJumpType trans_ldil(DisasContext *ctx, uint32_t insn)