From patchwork Thu Nov 8 12:16:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 150505 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp757341ljp; Thu, 8 Nov 2018 04:26:13 -0800 (PST) X-Google-Smtp-Source: AJdET5fMfJCt92pVLooWUwQI7j/I5pGizoi47sELgaHu39s/9O9g6xCeskk8TY1T+muN7XY98zOa X-Received: by 2002:a0c:884d:: with SMTP id 13mr4148618qvm.170.1541679973781; Thu, 08 Nov 2018 04:26:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541679973; cv=none; d=google.com; s=arc-20160816; b=S+YoobFYN6FGlfDVN/QuFVMrZnwHZq0F/Gsp/NmU8zhONuHaI4H4Z1fxq6u3lfXRBE amfVKVhK3bJryQzZ6oPPEPedC3Rjlh9r1HjN8BpIdl0fgI0Lmk688Hhs8fmMfA0lTT5l vEmSPv4jA/mJXJymyxZuI1ElnpodE5at90vD3VlpwWgTt9BQZHnGKCWUpDXzJh88LN0b KXNahEXMuM3MSlwUkSVZzDbW0aDjKroyqS1nr3zC4WZD7FZ8vGsJc2RFSkQBcJ8jCeTt CjPIIS5Aj+pLDs/e6a/bTO1A4ezm4iJYUzPx8dWhDSm+MZWHh8ImKZJdDy+HrIzyDhf0 Czeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=s82ccuJRwFTfSDb7MV3wpa2dTJvX31OdRrU5eA+1Xfc=; b=wPTv3rHS0O/ixetp1W/Q8xuEXc8VhcSAhiVsFSDyn3E8ZgHt8Qr9YxFmyo+fAel1VN Nho2HYDvGGKn7qU6yRLq4vfGsqcZh1Qn9oi70vNsrD+LEHBiQCx4p7EJoxHYNVlwyr2m T4dhAKE5T9kthApsuBdf/4NvvCj7iTk/0lVISZQOuuprQOwU4snJLQzirHu17yFiM/eM aHYLgdZx3tbOp6T/Hr5Fj3K8NXxxzq4cCxq/abS5o80sl5OOnlzHOkc6z8iLD76ijzWq SpDPrg9Mh1aR79jirtuzEzhFk2MK00ukYOYUxPVc3TTpYf0brPD5TQmDCmmG0Bd7P9pR LxPg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gibson.dropbear.id.au header.s=201602 header.b=hDLZoQug; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id y67-v6si2943710qkc.226.2018.11.08.04.26.13 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 08 Nov 2018 04:26:13 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gibson.dropbear.id.au header.s=201602 header.b=hDLZoQug; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:56299 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gKjO0-0000aj-VQ for patch@linaro.org; Thu, 08 Nov 2018 07:26:13 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43331) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gKjFC-0005CN-Hz for qemu-devel@nongnu.org; Thu, 08 Nov 2018 07:17:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gKjF9-0003d1-0k for qemu-devel@nongnu.org; Thu, 08 Nov 2018 07:17:04 -0500 Received: from ozlabs.org ([203.11.71.1]:57209) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gKjF6-0003b1-Td; Thu, 08 Nov 2018 07:17:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 42rMj05dBRz9sDb; Thu, 8 Nov 2018 23:16:51 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1541679412; bh=iXOPmoumeT7MYxOFsMfjvZCL4rocs4bFD6l7jrFX8fw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hDLZoQug8r9MNcWtmTAFzd1/DBXSeOWU7Pwge2C85N9uZhnCW37L+FHsfJx7rik3t T+DWsnKLyDDt9d4Amc/DOytnLEUiSzPsKijObHd+y5HcOx4ZDLtGwI/j24jt2VJz/0 U1JuYNXOVXD9t4qc2yRqy3yFURqNxqd7tAW6YBeM= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 8 Nov 2018 23:16:36 +1100 Message-Id: <20181108121646.26173-13-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181108121646.26173-1-david@gibson.dropbear.id.au> References: <20181108121646.26173-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 12/22] target/ppc: Split out float_invalid_cvt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Richard Henderson , agraf@suse.de, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 67 +++++++++++++++++------------------------ 1 file changed, 28 insertions(+), 39 deletions(-) -- 2.19.1 diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 127c08bcec..2ed4f42275 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -750,30 +750,30 @@ float64 helper_fdiv(CPUPPCState *env, float64 arg1, float64 arg2) return ret; } +static void float_invalid_cvt(CPUPPCState *env, bool set_fprc, + uintptr_t retaddr, int class1) +{ + float_invalid_op_vxcvi(env, set_fprc, retaddr); + if (class1 & is_snan) { + float_invalid_op_vxsnan(env, retaddr); + } +} #define FPU_FCTI(op, cvt, nanval) \ -uint64_t helper_##op(CPUPPCState *env, uint64_t arg) \ +uint64_t helper_##op(CPUPPCState *env, float64 arg) \ { \ - CPU_DoubleU farg; \ - \ - farg.ll = arg; \ - farg.ll = float64_to_##cvt(farg.d, &env->fp_status); \ + uint64_t ret = float64_to_##cvt(arg, &env->fp_status); \ + int status = get_float_exception_flags(&env->fp_status); \ \ - if (unlikely(env->fp_status.float_exception_flags)) { \ - if (float64_is_any_nan(arg)) { \ - float_invalid_op_vxcvi(env, 1, GETPC()); \ - if (float64_is_signaling_nan(arg, &env->fp_status)) { \ - float_invalid_op_vxsnan(env, GETPC()); \ - } \ - farg.ll = nanval; \ - } else if (env->fp_status.float_exception_flags & \ - float_flag_invalid) { \ - float_invalid_op_vxcvi(env, 1, GETPC()); \ + if (unlikely(status)) { \ + if (status & float_flag_invalid) { \ + float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \ + ret = nanval; \ } \ do_float_check_status(env, GETPC()); \ } \ - return farg.ll; \ - } + return ret; \ +} FPU_FCTI(fctiw, int32, 0x80000000U) FPU_FCTI(fctiwz, int32_round_to_zero, 0x80000000U) @@ -2965,6 +2965,7 @@ uint64_t helper_xscvspdpn(CPUPPCState *env, uint64_t xb) #define VSX_CVT_FP_TO_INT(op, nels, stp, ttp, sfld, tfld, rnan) \ void helper_##op(CPUPPCState *env, uint32_t opcode) \ { \ + int all_flags = env->fp_status.float_exception_flags, flags; \ ppc_vsr_t xt, xb; \ int i; \ \ @@ -2972,22 +2973,18 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ getVSR(xT(opcode), &xt, env); \ \ for (i = 0; i < nels; i++) { \ - if (unlikely(stp##_is_any_nan(xb.sfld))) { \ - if (stp##_is_signaling_nan(xb.sfld, &env->fp_status)) { \ - float_invalid_op_vxsnan(env, GETPC()); \ - } \ - float_invalid_op_vxcvi(env, 0, GETPC()); \ + env->fp_status.float_exception_flags = 0; \ + xt.tfld = stp##_to_##ttp##_round_to_zero(xb.sfld, &env->fp_status); \ + flags = env->fp_status.float_exception_flags; \ + if (unlikely(flags & float_flag_invalid)) { \ + float_invalid_cvt(env, 0, GETPC(), stp##_classify(xb.sfld)); \ xt.tfld = rnan; \ - } else { \ - xt.tfld = stp##_to_##ttp##_round_to_zero(xb.sfld, \ - &env->fp_status); \ - if (env->fp_status.float_exception_flags & float_flag_invalid) { \ - float_invalid_op_vxcvi(env, 0, GETPC()); \ - } \ } \ + all_flags |= flags; \ } \ \ putVSR(xT(opcode), &xt, env); \ + env->fp_status.float_exception_flags = all_flags; \ do_float_check_status(env, GETPC()); \ } @@ -3025,18 +3022,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ getVSR(rB(opcode) + 32, &xb, env); \ memset(&xt, 0, sizeof(xt)); \ \ - if (unlikely(stp##_is_any_nan(xb.sfld))) { \ - if (stp##_is_signaling_nan(xb.sfld, &env->fp_status)) { \ - float_invalid_op_vxsnan(env, GETPC()); \ - } \ - float_invalid_op_vxcvi(env, 0, GETPC()); \ + xt.tfld = stp##_to_##ttp##_round_to_zero(xb.sfld, &env->fp_status); \ + if (env->fp_status.float_exception_flags & float_flag_invalid) { \ + float_invalid_cvt(env, 0, GETPC(), stp##_classify(xb.sfld)); \ xt.tfld = rnan; \ - } else { \ - xt.tfld = stp##_to_##ttp##_round_to_zero(xb.sfld, \ - &env->fp_status); \ - if (env->fp_status.float_exception_flags & float_flag_invalid) { \ - float_invalid_op_vxcvi(env, 0, GETPC()); \ - } \ } \ \ putVSR(rD(opcode) + 32, &xt, env); \