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[25/26] target/arm: Enable PAuth for user-only, part 2

Message ID 20181207103631.28193-26-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Implement ARMv8.3-PAuth | expand

Commit Message

Richard Henderson Dec. 7, 2018, 10:36 a.m. UTC 
FIXME: We should have an attribute that controls the EL1 enable bits.
We may not always want to turn on pointer authentication with -cpu max.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/cpu.c | 6 ++++++
 1 file changed, 6 insertions(+)

-- 
2.17.2
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 0b185f8d30..bc2c9eb551 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -162,6 +162,12 @@  static void arm_cpu_reset(CPUState *s)
         env->pstate = PSTATE_MODE_EL0t;
         /* Userspace expects access to DC ZVA, CTL_EL0 and the cache ops */
         env->cp15.sctlr_el[1] |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE;
+        /* Enable all PAC keys. */
+        env->cp15.sctlr_el[1] |= SCTLR_EnIA | SCTLR_EnIB;
+        env->cp15.sctlr_el[1] |= SCTLR_EnDA | SCTLR_EnDB;
+        /* Enable all PAC instructions */
+        env->cp15.hcr_el2 |= HCR_API;
+        env->cp15.scr_el3 |= SCR_API;
         /* and to the FP/Neon instructions */
         env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 20, 2, 3);
         /* and to the SVE instructions */